Home
last modified time | relevance | path

Searched refs:outdiv (Results 1 – 3 of 3) sorted by relevance

/arch/mips/mach-ath79/ar934x/
A Dclk.c37 u8 outdiv; member
154 (pll_cfg->outdiv << AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT); in ar934x_pll_init()
163 (pll_cfg->outdiv << AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT); in ar934x_pll_init()
235 const u32 outdiv = (regval >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & in ar934x_cpupll_to_hz() local
245 return (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); in ar934x_cpupll_to_hz()
250 const u32 outdiv = (regval >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & in ar934x_ddrpll_to_hz() local
260 return (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); in ar934x_ddrpll_to_hz()
/arch/mips/mach-ath79/qca953x/
A Dlowlevel_init.S14 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
18 ((0x7 & outdiv) << 23) )
37 #define MK_PLL_CPU_CONF(frac, nint, ref, outdiv) \ argument
41 PLL_CPU_OUTDIV(outdiv))
47 #define MK_PLL_DDR_CONF(frac, nint, ref, outdiv) \ argument
51 PLL_DDR_OUTDIV(outdiv) | \
/arch/mips/mach-ath79/ar933x/
A Dlowlevel_init.S19 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
23 ((0x7 & outdiv) << 23) )

Completed in 8 milliseconds