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Searched refs:phy_con14 (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c69 writel(mem->phy0_pulld_dqs, &phy0_ctrl->phy_con14); in ddr3_mem_ctrl_init()
70 writel(mem->phy1_pulld_dqs, &phy1_ctrl->phy_con14); in ddr3_mem_ctrl_init()
197 writel(0, &phy0_ctrl->phy_con14); in ddr3_mem_ctrl_init()
198 writel(0, &phy1_ctrl->phy_con14); in ddr3_mem_ctrl_init()
536 val = readl(&phy0_ctrl->phy_con14); in ddr3_mem_ctrl_init()
538 writel(val, &phy0_ctrl->phy_con14); in ddr3_mem_ctrl_init()
539 val = readl(&phy1_ctrl->phy_con14); in ddr3_mem_ctrl_init()
541 writel(val, &phy1_ctrl->phy_con14); in ddr3_mem_ctrl_init()
773 writel(0, &phy0_ctrl->phy_con14); in ddr3_mem_ctrl_init()
774 writel(0, &phy1_ctrl->phy_con14); in ddr3_mem_ctrl_init()
/arch/arm/mach-exynos/include/mach/
A Ddmc.h344 unsigned int phy_con14; member
391 unsigned int phy_con14; member

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