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Searched refs:phy_con4 (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-exynos/include/mach/
A Ddmc.h334 unsigned int phy_con4; member
381 unsigned int phy_con4; member
/arch/arm/mach-imx/mx7/
A Dddr.c96 writel(ddr_phy_regs_val->phy_con4, &ddr_phy_regs->phy_con4); in mx7_dram_cfg()
/arch/arm/include/asm/arch-mx7/
A Dmx7-ddr.h130 u32 phy_con4; /* 0x0010 */ member
/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c79 writel(mem->phy0_dqs, &phy0_ctrl->phy_con4); in ddr3_mem_ctrl_init()
80 writel(mem->phy1_dqs, &phy1_ctrl->phy_con4); in ddr3_mem_ctrl_init()
282 return readl(&phy_ctrl->phy_con4); in dmc_get_read_offset_value()
307 writel(offset, &phy_ctrl->phy_con4); in dmc_set_read_offset_value()

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