Searched refs:pmu (Results 1 – 25 of 86) sorted by relevance
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| /arch/x86/lib/ |
| A D | pmu.c | 83 struct pmu_mid *pmu; in pmu_turn_power() local
91 pmu = dev_get_priv(dev); in pmu_turn_power()
93 return pmu_power_lss(pmu->regs, lss, on); in pmu_turn_power()
98 struct pmu_mid *pmu = dev_get_priv(dev); in pmu_mid_probe() local
100 pmu->regs = syscon_get_first_range(X86_SYSCON_PMU); in pmu_mid_probe()
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| /arch/arm/dts/ |
| A D | rk3xxx-u-boot.dtsi | 19 rockchip,pmu = <&pmu>;
29 &pmu {
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| A D | rk3188-u-boot.dtsi | 13 &pmu {
14 compatible = "rockchip,rk3188-pmu", "syscon", "simple-mfd";
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| A D | bcm2835.dtsi | 25 arm-pmu {
26 compatible = "arm,arm1176-pmu";
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| A D | rk3288-u-boot.dtsi | 36 rockchip,pmu = <&pmu>;
73 &pmu {
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| A D | dra72x.dtsi | 13 pmu {
14 compatible = "arm,cortex-a15-pmu";
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| A D | vf500.dtsi | 47 pmu@40089000 {
48 compatible = "arm,cortex-a5-pmu";
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| A D | sun8i-t113s.dtsi | 53 pmu {
54 compatible = "arm,cortex-a7-pmu";
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| A D | nuvoton-npcm845.dtsi | 56 arm-pmu {
57 compatible = "arm,cortex-a35-pmu";
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| A D | bcm2836.dtsi | 23 arm-pmu {
24 compatible = "arm,cortex-a7-pmu";
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| A D | bcm2837.dtsi | 22 arm-pmu {
23 compatible = "arm,cortex-a53-pmu";
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| A D | dra74x.dtsi | 22 pmu {
23 compatible = "arm,cortex-a15-pmu";
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| A D | juno-r2.dts | 211 pmu-a72 {
212 compatible = "arm,cortex-a72-pmu";
219 pmu-a53 {
220 compatible = "arm,cortex-a53-pmu";
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| A D | t8103-jxxx.dtsi | 139 pmu@f {
140 compatible = "apple,sera-pmu";
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| A D | rv1126-u-boot.dtsi | 44 &pmu {
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| A D | exynos4210.dtsi | 71 pmu {
72 compatible = "arm,cortex-a9-pmu";
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| A D | fsl-imx8-ca35.dtsi | 56 pmu {
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| A D | fsl-imx8qxp.dtsi | 40 pmu {
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| A D | sun8i-h3.dtsi | 135 pmu {
136 compatible = "arm,cortex-a7-pmu";
224 "pmu";
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| A D | fvp-base-revc.dts | 145 pmu {
150 spe-pmu {
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| A D | sun50i-h5.dtsi | 54 pmu {
55 compatible = "arm,cortex-a53-pmu";
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| /arch/arm/mach-exynos/ |
| A D | power.c | 14 struct exynos4_power *pmu = in exynos4_mipi_phy_control() local
19 addr = (unsigned int)&pmu->mipi_phy0_control; in exynos4_mipi_phy_control()
21 addr = (unsigned int)&pmu->mipi_phy1_control; in exynos4_mipi_phy_control()
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| A D | dmc_init_ddr3.c | 448 struct exynos5_power *pmu; in ddr3_mem_ctrl_init() local
463 pmu = (struct exynos5_power *)EXYNOS5420_POWER_BASE; in ddr3_mem_ctrl_init()
802 dmc_set_read_offset_value(phy0_ctrl, readl(&pmu->pmu_spare1)); in ddr3_mem_ctrl_init()
803 dmc_set_read_offset_value(phy1_ctrl, readl(&pmu->pmu_spare2)); in ddr3_mem_ctrl_init()
810 writel(dmc_get_read_offset_value(phy0_ctrl), &pmu->pmu_spare1); in ddr3_mem_ctrl_init()
811 writel(dmc_get_read_offset_value(phy1_ctrl), &pmu->pmu_spare2); in ddr3_mem_ctrl_init()
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| /arch/arm/mach-tegra/tegra20/ |
| A D | Makefile | 17 obj-$(CONFIG_TEGRA_PMU) += pmu.o
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| /arch/x86/dts/ |
| A D | edison.dts | 105 pmu: power@ff00b000 { label
106 compatible = "intel,pmu-mid";
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