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Searched refs:post_code (Results 1 – 25 of 29) sorted by relevance

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/arch/x86/cpu/intel_common/
A Dcar.S42 post_code(POST_CAR_START)
57 post_code(POST_CAR_SIPI)
71 post_code(POST_CAR_MTRR)
78 post_code(POST_CAR_UNCACHEABLE)
85 post_code(POST_CAR_BASE_ADDRESS)
92 post_code(POST_CAR_MASK)
126 post_code(POST_CAR_FILL)
145 post_code(POST_CAR_ROM_CACHE)
158 post_code(POST_CAR_MRC_CACHE)
164 post_code(POST_CAR_CPU_CACHE)
A Dcar2.S21 post_code(POST_CAR_START)
40 post_code(POST_CAR_SIPI)
53 post_code(POST_CAR_MTRR)
71 post_code(POST_CAR_UNCACHEABLE)
99 post_code(POST_CAR_BASE_ADDRESS)
149 post_code(POST_CAR_FILL)
A Dmrc.c210 post_code(POST_PRE_MRC); in sdram_initialise()
223 post_code(POST_MRC); in sdram_initialise()
280 post_code(POST_DRAM); in mrc_common_init()
/arch/x86/lib/fsp1/
A Dfsp_car.S18 post_code(POST_BIST_FAILURE)
22 post_code(POST_CAR_START)
47 post_code(POST_CAR_CPU_CACHE)
80 post_code(POST_CAR_FAILURE)
A Dfsp_support.c75 post_code(POST_MRC); in fsp_continue()
137 post_code(POST_PRE_MRC); in fsp_init()
A Dfsp_common.c67 post_code(POST_RESUME_FAILURE); in arch_fsp_init()
/arch/x86/cpu/ivybridge/
A Dcpu.c51 post_code(POST_CPU_INIT); in arch_cpu_init()
61 post_code(0x70); in ivybridge_cpu_init()
63 post_code(0x71); in ivybridge_cpu_init()
66 post_code(0x72); in ivybridge_cpu_init()
165 post_code(POST_EARLY_INIT); in checkcpu()
A Divybridge.c13 post_code(POST_CPU_INIT); in arch_cpu_init()
/arch/x86/cpu/qemu/
A Dcar.S14 post_code(POST_CAR_START)
24 post_code(POST_CAR_CPU_CACHE)
A Ddram.c47 post_code(POST_DRAM); in dram_init()
A Dqemu.c111 post_code(POST_CPU_INIT); in arch_cpu_init()
/arch/x86/include/asm/
A Dpost.h42 #define post_code(value) \ macro
48 static inline void post_code(int code) in post_code() function
/arch/x86/cpu/quark/
A Dcar.S14 post_code(POST_CAR_START)
39 post_code(POST_CAR_CPU_CACHE)
A Dmrc.c170 uint8_t major = init[i].post_code >> 8 & 0xff; in mrc_mem_init()
171 uint8_t minor = init[i].post_code >> 0 & 0xff; in mrc_mem_init()
/arch/x86/cpu/braswell/
A Dbraswell.c13 post_code(POST_CPU_INIT); in arch_cpu_init()
/arch/x86/cpu/baytrail/
A Dvalleyview.c24 post_code(POST_CPU_INIT); in arch_cpu_init()
/arch/x86/cpu/
A Dstart.S101 post_code(POST_START)
173 post_code(POST_START_DONE)
A Dlapic.c157 post_code(POST_LAPIC); in lapic_setup()
A Dcpu.c169 post_code(POST_CPU_INFO); in print_cpuinfo()
/arch/x86/lib/
A Dacpi_s3.c42 post_code(POST_OS_RESUME); in acpi_resume()
A Dramtest.c74 post_code(POST_RAM_FAILURE); in quick_ram_check()
/arch/x86/cpu/broadwell/
A Dcpu.c68 post_code(POST_CPU_INIT); in arch_cpu_init()
/arch/x86/cpu/queensbay/
A Dtnc.c94 post_code(POST_CPU_INIT); in arch_cpu_init()
/arch/x86/include/asm/arch-quark/
A Dmrc.h167 uint16_t post_code; member
/arch/x86/lib/fsp/
A Dfsp_dram.c37 post_code(POST_DRAM); in fsp_scan_for_ram_size()

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