Searched refs:pregs (Results 1 – 2 of 2) sorted by relevance
| /arch/arm/mach-mvebu/armada8k/ |
| A D | dram.c | 20 struct pt_regs pregs; in a8k_dram_scan_ap_sz() local
22 pregs.regs[0] = MV_SIP_DRAM_SIZE; in a8k_dram_scan_ap_sz()
23 pregs.regs[1] = SOC_REGS_PHY_BASE; in a8k_dram_scan_ap_sz()
24 smc_call(&pregs); in a8k_dram_scan_ap_sz()
26 return pregs.regs[0]; in a8k_dram_scan_ap_sz()
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| /arch/mips/mach-ath79/ |
| A D | reset.c | 117 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in eth_init_ar933x() local
131 clrsetbits_be32(pregs + AR933X_PLL_SWITCH_CLOCK_CONTROL_REG, in eth_init_ar933x()
152 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in eth_init_ar934x() local
163 writel(0x570, pregs + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); in eth_init_ar934x()
165 writel(0x271, pregs + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); in eth_init_ar934x()
209 writel(BIT(2) | BIT(0), pregs + QCA956X_PLL_ETH_SGMII_SERDES_REG); in qca956x_sgmii_cal()
248 writel(BIT(2) | BIT(0), pregs + QCA956X_PLL_ETH_SGMII_SERDES_REG); in qca956x_sgmii_cal()
409 writel(0x45500, pregs + QCA956X_PLL_SWITCH_CLK_CTRL_REG); in eth_init_qca956x()
411 writel(0xc5200, pregs + QCA956X_PLL_SWITCH_CLK_CTRL_REG); in eth_init_qca956x()
419 pregs + QCA956X_PLL_ETH_XMII_CTRL_REG); in eth_init_qca956x()
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