| /arch/arm/mach-k3/ |
| A D | schema.yaml | 34 $ref: "#/definitions/u8"
36 $ref: "#/definitions/u8"
44 $ref: "#/definitions/u8"
46 $ref: "#/definitions/u8"
58 $ref: "#/definitions/u8"
60 $ref: "#/definitions/u16"
74 $ref: "#/definitions/u8"
76 $ref: "#/definitions/u8"
78 $ref: "#/definitions/u8"
91 $ref: "#/definitions/u8"
[all …]
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| /arch/arm/dts/ |
| A D | sun7i-a20.dtsi | 779 /omit-if-no-ref/
785 /omit-if-no-ref/
791 /omit-if-no-ref/
797 /omit-if-no-ref/
803 /omit-if-no-ref/
811 /omit-if-no-ref/
817 /omit-if-no-ref/
825 /omit-if-no-ref/
836 /omit-if-no-ref/
842 /omit-if-no-ref/
[all …]
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| A D | uniphier-ld4-ref.dts | 10 #include "uniphier-ref-daughter.dtsi"
15 compatible = "socionext,uniphier-ld4-ref", "socionext,uniphier-ld4";
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| A D | uniphier-sld8-ref.dts | 10 #include "uniphier-ref-daughter.dtsi"
15 compatible = "socionext,uniphier-sld8-ref", "socionext,uniphier-sld8";
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| A D | uniphier-ld11-ref.dts | 10 #include "uniphier-ref-daughter.dtsi"
15 compatible = "socionext,uniphier-ld11-ref", "socionext,uniphier-ld11";
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| A D | uniphier-ld20-ref.dts | 10 #include "uniphier-ref-daughter.dtsi"
15 compatible = "socionext,uniphier-ld20-ref", "socionext,uniphier-ld20";
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| A D | uniphier-ld6b-ref.dts | 10 #include "uniphier-ref-daughter.dtsi"
15 compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b";
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| A D | uniphier-pro4-ref.dts | 10 #include "uniphier-ref-daughter.dtsi"
15 compatible = "socionext,uniphier-pro4-ref", "socionext,uniphier-pro4";
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| A D | zynqmp-clk-ccf.dtsi | 13 pss_ref_clk: pss-ref-clk {
29 pss_alt_ref_clk: pss-alt-ref-clk {
37 gt_crx_ref_clk: gt-crx-ref-clk {
45 aux_ref_clk: aux-ref-clk {
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| A D | qemu-sbsa.dts | 3 * Devicetree with onboard devices for qemu_sbsa-ref for internal use only!
20 compatible = "linux,sbsa-ref";
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| A D | mt7623.dtsi | 332 clock-names = "ref";
349 clock-names = "ref";
379 clock-names = "ref";
386 clock-names = "ref";
412 clock-names = "ref";
420 clock-names = "ref";
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| A D | sun8i-r40.dtsi | 569 /omit-if-no-ref/
577 /omit-if-no-ref/
656 /omit-if-no-ref/
665 /omit-if-no-ref/
671 /omit-if-no-ref/
677 /omit-if-no-ref/
683 /omit-if-no-ref/
689 /omit-if-no-ref/
695 /omit-if-no-ref/
701 /omit-if-no-ref/
[all …]
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| A D | socfpga_cyclone5_mcvevk.dts | 64 ts,ref-sel = <0>;
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| A D | o4-imx-nano.dts | 174 clock-names = "rmii-ref";
184 clock-names = "rmii-ref";
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| A D | imx6ul-kontron-bl-common-u-boot.dtsi | 54 clock-names = "rmii-ref";
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| A D | imx6ull-dart-6ul.dts | 22 clock-names = "rmii-ref";
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| A D | imx6ull-seeed-npi-imx6ull.dtsi | 91 clock-names = "rmii-ref";
99 clock-names = "rmii-ref";
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| A D | ev-imx280-nano-x-mb.dts | 89 clock-names = "rmii-ref";
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| /arch/arm/mach-imx/mx5/ |
| A D | clock.c | 557 u32 n_ref = ref, i; in calc_pll_params()
563 if (n_target < PLL_FREQ_MIN(ref) || in calc_pll_params()
564 n_target > PLL_FREQ_MAX(ref)) { in calc_pll_params()
567 PLL_FREQ_MIN(ref) / SZ_DEC_1M, in calc_pll_params()
568 PLL_FREQ_MAX(ref) / SZ_DEC_1M); in calc_pll_params()
573 if (fixed_mfd[i].ref_clk_hz == ref) { in calc_pll_params()
844 static int config_ldb_clk(u32 ref, u32 freq) in config_ldb_clk() argument
861 static int config_ldb_clk(u32 ref, u32 freq) in config_ldb_clk() argument
894 if (config_core_clk(ref, freq)) in mxc_set_clock()
898 if (config_periph_clk(ref, freq)) in mxc_set_clock()
[all …]
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| /arch/arm/cpu/armv7/bcm235xx/ |
| A D | clk-core.c | 175 struct refclk *ref = refclk_str_to_clk(*clock); in peri_clk_set_rate() local
176 if (!ref) { in peri_clk_set_rate()
182 div = ref->clk.rate / rate; in peri_clk_set_rate()
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
192 c->parent = &ref->clk; in peri_clk_set_rate()
211 struct refclk *ref; in peri_clk_get_rate() local
233 ref = refclk_str_to_clk(clock[c->sel]); in peri_clk_get_rate()
234 if (!ref) { in peri_clk_get_rate()
239 c->parent = &ref->clk; in peri_clk_get_rate()
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| /arch/arm/cpu/armv7/bcm281xx/ |
| A D | clk-core.c | 175 struct refclk *ref = refclk_str_to_clk(*clock); in peri_clk_set_rate() local
176 if (!ref) { in peri_clk_set_rate()
182 div = ref->clk.rate / rate; in peri_clk_set_rate()
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
192 c->parent = &ref->clk; in peri_clk_set_rate()
211 struct refclk *ref; in peri_clk_get_rate() local
233 ref = refclk_str_to_clk(clock[c->sel]); in peri_clk_get_rate()
234 if (!ref) { in peri_clk_get_rate()
239 c->parent = &ref->clk; in peri_clk_get_rate()
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| /arch/mips/mach-ath79/qca953x/ |
| A D | lowlevel_init.S | 37 #define MK_PLL_CPU_CONF(frac, nint, ref, outdiv) \ argument
40 PLL_CPU_REFDIV(ref) | \
47 #define MK_PLL_DDR_CONF(frac, nint, ref, outdiv) \ argument
49 PLL_DDR_REFDIV(ref) | \
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| /arch/riscv/dts/ |
| A D | sunxi-d1s-t113.dtsi | 55 /omit-if-no-ref/
61 /omit-if-no-ref/
67 /omit-if-no-ref/
73 /omit-if-no-ref/
81 /omit-if-no-ref/
90 /omit-if-no-ref/
96 /omit-if-no-ref/
102 /omit-if-no-ref/
108 /omit-if-no-ref/
116 /omit-if-no-ref/
[all …]
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| /arch/arm/include/asm/arch-mx5/ |
| A D | clock.h | 47 int mxc_set_clock(u32 ref, u32 freq, enum mxc_clock clk);
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| /arch/arm/include/asm/arch-tegra20/ |
| A D | emc.h | 62 u32 ref; /* 0xD4: EMC_REF */ member
|