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Searched refs:refresh (Results 1 – 9 of 9) sorted by relevance

/arch/arm/mach-lpc32xx/
A Ddram.c32 writel(0x7FF, &emc->refresh); in ddr_init()
52 writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh); in ddr_init()
60 writel((((128) >> 4) & 0x7FF), &emc->refresh); in ddr_init()
63 writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh); in ddr_init()
/arch/arm/include/asm/arch-lpc32xx/
A Demc.h18 u32 refresh; /* Configures dyn memory refresh operation */ member
94 u32 refresh; member
/arch/arm/dts/
A Drk3288-veyron-u-boot.dtsi28 rockchip,auto-self-refresh-cnt = <0>;
/arch/arm/include/asm/arch-tegra20/
A Demc.h41 u32 refresh; /* 0x70: EMC_REFRESH */ member
/arch/arm/mach-omap2/am33xx/
A DKconfig247 self-refresh mode is a special power saving mode where in all
252 as the DDR has contents is in self-refresh and restore path is
/arch/powerpc/cpu/mpc83xx/
A Dspd_sdram.c121 printf ("Refresh rate: %02X\n", spd->refresh); in spd_debug()
713 switch (spd.refresh) { in spd_sdram()
/arch/x86/dts/
A Dgalileo.dts55 refresh-rate = <DRAM_REFRESH_RATE_785US>;
/arch/arm/mach-socfpga/
A Dwrap_sdram_config.c213 .refresh = RW_MGR_REFRESH,
/arch/arm/mach-socfpga/include/mach/
A Dsdram_gen5.h185 u8 refresh; member

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