Searched refs:reg1 (Results 1 – 6 of 6) sorted by relevance
| /arch/arm/lib/ |
| A D | memcpy.S | 20 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
21 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
24 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
25 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
36 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
37 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
44 .macro enter reg1 reg2
45 stmdb sp!, {r0, \reg1, \reg2}
48 .macro exit reg1 reg2
49 ldmfd sp!, {r0, \reg1, \reg2}
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| /arch/arm/mach-keystone/ |
| A D | clock.c | 38 setbits_le32(keystone_pll_regs[PASS_PLL].reg1, CFG_PLLCTL1_PAPLL_MASK); in pll_pa_clk_sel()
82 clrsetbits_le32(keystone_pll_regs[data->pll].reg1, in configure_mult_div()
104 setbits_le32(keystone_pll_regs[data->pll].reg1, in configure_main_pll()
170 setbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_ENSAT_MASK); in configure_secondary_pll()
183 setbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
191 clrbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
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| /arch/arm/mach-keystone/include/mach/ |
| A D | clock.h | 108 u32 reg1; member
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| /arch/arm/include/asm/mach-imx/ |
| A D | sys_proto.h | 312 unsigned long reg1, unsigned long reg2,
315 unsigned long *reg1, unsigned long reg2,
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| /arch/mips/mach-octeon/ |
| A D | cvmx-pko3-compat.c | 590 if (cvmx_unlikely(pko_command.s.reg1)) { in cvmx_pko3_legacy_xmit()
594 pko_command.s.reg1, pko_command.s.size1); in cvmx_pko3_legacy_xmit()
598 CASTPTR(void, __cvmx_fau_sw_addr(pko_command.s.reg1))); in cvmx_pko3_legacy_xmit()
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| /arch/mips/mach-octeon/include/mach/ |
| A D | cvmx-hwpko.h | 110 u64 reg1 : 11; member
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