Searched refs:sccr (Results 1 – 5 of 5) sorted by relevance
22 uint sccr = in_be32(&immap->im_clkrst.car_sccr); in get_clocks() local23 uint divider = 1 << (((sccr & SCCR_DFBRG11) >> 11) * 2); in get_clocks()33 if ((sccr & SCCR_EBDF11) == 0) { in get_clocks()
84 u32 sccr; in get_clocks() local151 sccr = im->clk.sccr; in get_clocks()155 switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) { in get_clocks()176 switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) { in get_clocks()197 switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) { in get_clocks()217 if (!(sccr & SCCR_TSEC1ON)) in get_clocks()219 if (!(sccr & SCCR_TSEC2ON)) in get_clocks()224 switch ((sccr & SCCR_USBMPHCM) >> SCCR_USBMPHCM_SHIFT) { in get_clocks()250 switch ((sccr & SCCR_ENCCM) >> SCCR_ENCCM_SHIFT) { in get_clocks()269 switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) { in get_clocks()[all …]
43 u32 sccr; in get_pcie_clk() local48 sccr = im->clk.sccr; in get_pcie_clk()54 testval = (sccr & SCCR_PCIEXP2CM) >> SCCR_PCIEXP2CM_SHIFT; in get_pcie_clk()56 testval = (sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT; in get_pcie_clk()
152 clrsetbits_be32(&im->clk.sccr, sccr_mask, sccr_val); in cpu_init_f()
200 u32 sccr; /* system clock control Register */ member
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