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Searched refs:sdelay (Results 1 – 25 of 28) sorted by relevance

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/arch/arm/mach-exynos/
A Ddmc_init_exynos4.c95 sdelay(0x100000); in dmc_init()
140 sdelay(0x100000); in dmc_init()
144 sdelay(0x100000); in dmc_init()
148 sdelay(0x100000); in dmc_init()
151 sdelay(0x100000); in dmc_init()
155 sdelay(0x100000); in dmc_init()
159 sdelay(0x100000); in dmc_init()
162 sdelay(0x100000); in dmc_init()
A Ddmc_common.c56 sdelay(100); in dmc_config_zq()
65 sdelay(100); in dmc_config_zq()
116 sdelay(0x10000); in dmc_config_mrs()
122 sdelay(0x10000); in dmc_config_mrs()
130 sdelay(10000); in dmc_config_mrs()
149 sdelay(0x10000); in dmc_config_prech()
A Dclock_init_exynos4.c45 sdelay(0x10000); in system_clock_init()
59 sdelay(0x10000); in system_clock_init()
92 sdelay(0x30000); in system_clock_init()
A Dcommon_setup.h49 void sdelay(unsigned long);
A Ddmc_init_ddr3.c190 sdelay(100); in ddr3_mem_ctrl_init()
645 sdelay(10); in ddr3_mem_ctrl_init()
655 sdelay(10); in ddr3_mem_ctrl_init()
751 sdelay(100); in ddr3_mem_ctrl_init()
766 sdelay(100); in ddr3_mem_ctrl_init()
/arch/arm/mach-sunxi/
A Dclock_sun9i.c33 sdelay(2000); in clock_set_pll2()
48 sdelay(2000); in clock_set_pll4()
62 sdelay(2000); in clock_set_pll12()
147 sdelay(2000); in clock_set_pll1()
165 sdelay(2000); in clock_set_pll6()
A Dclock_sun4i.c28 sdelay(20); in clock_init_safe()
30 sdelay(200); in clock_init_safe()
36 sdelay(20); in clock_init_safe()
157 sdelay(20); in clock_set_pll1()
168 sdelay(200); in clock_set_pll1()
176 sdelay(20); in clock_set_pll1()
A Dclock_sun8i_a83t.c32 sdelay(50); in clock_init_safe()
34 sdelay(100); in clock_init_safe()
A Ddram_sun9i.c277 sdelay(2000); in mctl_sys_init()
287 sdelay(1000); in mctl_sys_init()
295 sdelay(10000); in mctl_sys_init()
303 sdelay(2000); in mctl_sys_init()
331 sdelay(1000); in mctl_sys_init()
754 sdelay(10000); /* XXX necessary? */ in mctl_channel_init()
760 sdelay(1000); in mctl_channel_init()
803 sdelay(100000); in mctl_channel_init()
/arch/arm/mach-keystone/
A Dclock.c45 sdelay(450); in wait_for_completion()
57 sdelay(340); in bypass_main_pll()
98 sdelay(210000); in configure_main_pll()
113 sdelay(21000); in configure_main_pll()
152 sdelay(21000); /* Wait for a minimum of 7 us*/ in configure_main_pll()
154 sdelay(105000); /* Wait for PLL Lock time (min 50 us) */ in configure_main_pll()
185 sdelay(21000); in configure_secondary_pll()
193 sdelay(105000); in configure_secondary_pll()
215 sdelay(210000); in init_pll()
/arch/arm/mach-omap2/omap3/
A Dspl_id_nand.c34 sdelay(2000); in identify_nand_chip()
41 sdelay(100); in identify_nand_chip()
A Dsdrc.c168 sdelay(0x20000); in do_sdrc_init()
A Dboard.c202 sdelay(100); in s_init()
A Dclock.c699 sdelay(5000); in prcm_init()
797 sdelay(1000); in per_clocks_enable()
/arch/arm/mach-omap2/
A Dmem-common.c71 sdelay(1000); in enable_gpmc_cs_config()
82 sdelay(2000); in enable_gpmc_cs_config()
152 sdelay(1000); in set_gpmc_cs0()
A Dvc.c124 sdelay(100); in omap_vc_bypass_send_value()
/arch/arm/include/asm/arch-sunxi/
A Dsys_proto.h13 void sdelay(unsigned long);
/arch/arm/cpu/arm926ejs/
A Dcpu.c30 void sdelay(unsigned long loops) in sdelay() function
/arch/arm/cpu/armv7/
A Dsyslib.c19 void sdelay(unsigned long loops) in sdelay() function
/arch/arm/cpu/armv8/
A Dcpu.c29 void sdelay(unsigned long loops) in sdelay() function
/arch/arm/include/asm/arch-am33xx/
A Dsys_proto.h26 void sdelay(unsigned long);
/arch/arm/mach-socfpga/
A Dclock_manager_arria10.c17 void sdelay(unsigned long loops);
557 sdelay(1000000); /* 1ms */ in cm_pll_ramp_main()
563 sdelay(1000000); /* 1ms */ in cm_pll_ramp_main()
591 sdelay(1000000); /* 1ms */ in cm_pll_ramp_periph()
597 sdelay(1000000); /* 1ms */ in cm_pll_ramp_periph()
742 sdelay(5000); in cm_full_cfg()
753 sdelay(7000); in cm_full_cfg()
/arch/arm/include/asm/arch-omap3/
A Dsys_proto.h59 void sdelay(unsigned long);
/arch/arm/include/asm/arch-omap5/
A Dsys_proto.h53 void sdelay(unsigned long);
/arch/arm/mach-keystone/include/mach/
A Dhardware.h394 void sdelay(unsigned long);

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