Searched refs:secure (Results 1 – 25 of 91) sorted by relevance
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| /arch/arm/dts/ |
| A D | k3-j721e-binman.dtsi | 13 ti-secure-rom { 26 ti-secure-rom { 39 ti-secure-rom { 41 core = "secure"; 58 ti-secure-rom { 60 core = "secure"; 91 ti-secure { 99 ti-secure { 107 ti-secure { 115 ti-secure { [all …]
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| A D | k3-am65x-binman.dtsi | 13 ti-secure-rom { 25 ti-secure-rom { 27 core = "secure"; 51 ti-secure-rom { 64 ti-secure-rom { 66 core = "secure"; 118 ti-secure { 132 ti-secure { 171 ti-secure { 189 ti-secure {
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| A D | k3-am625-phycore-som-binman.dtsi | 15 ti-secure-rom { 59 ti-secure-rom { 102 ti-secure-rom { 158 ti-secure-rom { 257 ti-secure { 271 ti-secure { 312 ti-secure { 327 ti-secure { 342 ti-secure { 357 ti-secure { [all …]
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| A D | k3-am62a-phycore-som-binman.dtsi | 20 ti-secure-rom { 64 ti-secure-rom { 127 ti-secure-rom { 129 core = "secure"; 195 ti-secure { 209 ti-secure { 250 ti-secure { 265 ti-secure { 280 ti-secure { 295 ti-secure { [all …]
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| A D | k3-j721s2-binman.dtsi | 13 ti-secure-rom { 56 ti-secure-rom { 100 ti-secure-rom { 149 ti-secure { 182 * Already configured by the secure entity 195 * Already configured by the secure entity 210 ti-secure { 272 ti-secure { 286 ti-secure { 326 ti-secure {
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| A D | k3-j7200-binman.dtsi | 13 ti-secure-rom { 57 ti-secure-rom { 100 ti-secure-rom { 145 ti-secure-rom { 189 ti-secure-rom { 237 ti-secure { 256 * Already configured by the secure entity 283 ti-secure { 327 ti-secure { 341 ti-secure { [all …]
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| A D | k3-am62a-sk-binman.dtsi | 17 ti-secure-rom { 61 ti-secure-rom { 111 ti-secure-rom { 113 core = "secure"; 179 ti-secure { 193 ti-secure { 235 ti-secure {
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| A D | k3-am62p-sk-binman.dtsi | 15 ti-secure-rom { 62 ti-secure-rom { 128 ti-secure-rom { 130 core = "secure"; 195 ti-secure { 211 ti-secure { 255 ti-secure {
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| A D | k3-j784s4-binman.dtsi | 17 ti-secure-rom { 64 ti-secure-rom { 111 ti-secure-rom { 158 ti-secure { 173 ti-secure { 215 ti-secure {
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| A D | k3-j722s-binman.dtsi | 13 ti-secure-rom { 63 ti-secure-rom { 121 ti-secure { 137 ti-secure { 180 ti-secure {
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| A D | k3-am62p5-verdin-r5.dts | 40 ti,secure-host; 50 compatible = "ti,am654-secure-proxy"; 75 ti,secure-host;
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| A D | k3-am67a-r5-beagley-ai.dts | 43 ti,secure-host; 57 ti,secure-host; 62 compatible = "ti,am654-secure-proxy";
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| A D | k3-am642-phycore-som-binman.dtsi | 15 ti-secure-rom { 53 ti-secure-rom { 90 ti-secure-rom { 155 ti-secure { 195 ti-secure { 320 ti-secure { 361 ti-secure { 376 ti-secure { 391 ti-secure { 406 ti-secure { [all …]
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| A D | k3-am625-sk-binman.dtsi | 13 ti-secure-rom { 57 ti-secure-rom { 100 ti-secure-rom { 156 ti-secure-rom { 158 core = "secure"; 194 ti-secure-rom { 196 core = "secure"; 255 ti-secure { 269 ti-secure { 311 ti-secure {
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| A D | k3-am62p5-verdin-wifi-dev-binman.dtsi | 15 ti-secure-rom { 64 ti-secure-rom { 121 ti-secure-rom { 123 core = "secure"; 188 ti-secure { 205 ti-secure { 249 ti-secure {
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| A D | corstone1000.dtsi | 160 secure-status = "okay"; /* secure-world-only */ 172 secure-status = "okay"; /* secure-world-only */
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| A D | k3-j722s-r5-evm.dts | 42 ti,secure-host; 56 ti,secure-host; 61 compatible = "ti,am654-secure-proxy";
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| A D | k3-am625-verdin-wifi-dev-binman.dtsi | 13 ti-secure-rom { 57 ti-secure-rom { 100 ti-secure-rom { 144 ti-secure-rom { 146 core = "secure"; 182 ti-secure-rom { 184 core = "secure"; 243 ti-secure { 257 ti-secure { 297 ti-secure {
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| A D | k3-am64x-binman.dtsi | 11 ti-secure-rom { 49 ti-secure-rom { 86 ti-secure-rom { 154 ti-secure { 169 ti-secure { 216 ti-secure { 234 ti-secure {
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| A D | k3-am62p5-r5-sk.dts | 43 ti,secure-host; 57 ti,secure-host; 62 compatible = "ti,am654-secure-proxy";
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| A D | k3-binman.dtsi | 138 ti-secure { 153 ti-secure { 167 ti-secure { 181 ti-secure { 275 ti-secure { 291 ti-secure { 318 ti-secure { 407 ti-secure {
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| /arch/arm/cpu/armv7/ |
| A D | Kconfig | 13 bool "Enable support for booting in non-secure mode" if EXPERT 17 Say Y here to enable support for booting in non-secure / SVC mode. 20 bool "Boot in secure mode by default" if EXPERT 24 Say Y here to boot in secure mode by default even if non-secure mode 26 suppport booting in non-secure mode. Only set this if you need it. 31 bool "Enable support for a ahardware secure memory area" 36 hex "Base address for secure mode memory" 52 Reserve top 1M for secure RAM 71 Used by the PSCI code to configure the secure side of the GIC. 78 Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
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| /arch/arm/mach-omap2/ |
| A D | utils.c | 58 const char *secure; in omap_set_fastboot_secure() local 63 secure = "EMU"; in omap_set_fastboot_secure() 66 secure = "HS"; in omap_set_fastboot_secure() 69 secure = "GP"; in omap_set_fastboot_secure() 72 secure = NULL; in omap_set_fastboot_secure() 76 env_set("fastboot.secure", secure); in omap_set_fastboot_secure()
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| /arch/arm/cpu/ |
| A D | u-boot.lds | 19 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not 23 * address for secure code. 25 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will 27 * were used in secure code. The absolute addresses of the secure 61 /* Align the secure section only if we're going to use it in situ */ 115 "Error: secure section exceeds secure memory size"); 120 /* Reset VMA but don't allocate space if we have secure SRAM */
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| /arch/arm/cpu/armv8/ |
| A D | Kconfig | 64 menu "ARMv8 secure monitor firmware" 66 bool "Enable ARMv8 secure monitor firmware framework support" 70 This framework is aimed at making secure monitor firmware load 74 - Address of secure firmware. 75 - Address to hold the return address from secure firmware. 78 - The target exception level that secure monitor firmware will 82 bool "Enable ARMv8 secure monitor firmware framework support for SPL" 97 bool "PSCI implementation in secure monitor firmware" 101 This config enables the ARMv8 PSCI implementation in secure monitor 106 bool "ARMv8 secure monitor firmware ERET address byteorder swap" [all …]
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