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Searched refs:setup (Results 1 – 25 of 61) sorted by relevance

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/arch/arm/mach-omap2/
A Dabb.c22 static void abb_setup_timings(u32 setup) in abb_setup_timings() argument
54 setbits_le32(setup, in abb_setup_timings()
58 void abb_setup(u32 fuse, u32 ldovbb, u32 setup, u32 control, in abb_setup() argument
64 if (!setup || !control || !txdone) in abb_setup()
99 writel(0, setup); in abb_setup()
103 abb_setup_timings(setup); in abb_setup()
109 setbits_le32(setup, abb_type_mask | OMAP_ABB_SETUP_SR2EN_MASK); in abb_setup()
/arch/arm/dts/
A Dtegra30-asus-tf201.dts56 /delete-property/ nvidia,xcvr-setup-use-fuses;
57 nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */
A Dcn9132-db-A.dts10 model = "Marvell CN9132 development board (CP NOR) setup(A)";
A Dcn9132-db-B.dts10 model = "Marvell CN9132 development board (CP NAND) setup(B)";
A Dfsl-ls1028a-qds-6xxx-sch-30842.dtsi9 * This setup is using SCH-30842 cards with AQR112 PHY.
A Dt8103-j313.dts44 * cs-setup and cs-hold delays are derived from Apple's ADT
48 spi-cs-setup-delay-ns = <20000>;
A Dfsl-ls1028a-qds-8xxx-sch-24801.dtsi9 * This setup is using SCH-24801 cards with VSC8234 quad SGMII PHY in slot 1.
A Dfsl-ls1028a-qds-1xxx-sch-30842.dtsi9 * This setup is using a SCH-30842 card with AQR112 PHY in slot 1 for ENETC
A Dt8103-j293.dts44 * cs-setup and cs-hold delays are derived from Apple's ADT
48 spi-cs-setup-delay-ns = <20000>;
A Dcn9130-db-B.dts9 model = "Marvell CN9130 development board (CP NAND) setup(B)";
A Dcn9130-db-A.dts9 model = "Marvell CN9130 development board (CP NOR) setup(A)";
A Dimx6q-display5-u-boot.dtsi15 * setup pinmux for it again.
A Dcn9131-db-A.dts10 model = "Marvell CN9131 development board (CP NOR) setup(A)";
A Dcn9131-db-B.dts10 model = "Marvell CN9131 development board (CP NAND) setup(B)";
A Dfsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi9 * This setup is using SCH-28021 cards with VSC8514 QSGMII PHY in slot 2.
/arch/sandbox/include/asm/
A Dspi.h24 int (*setup)(void **priv, const char *spec); member
/arch/powerpc/cpu/mpc83xx/elbc/
A DKconfig1 menu "ELBC register setup"
/arch/arm/mach-npcm/npcm7xx/
A Dl2_cache_pl310_init.S37 @ 1 cycle RAM setup latency
44 @ 1 cycle RAM setup latency
/arch/arm/mach-at91/include/mach/
A Dat91sam9_smc.h29 u32 setup; /* 0x00 SMC Setup Register */ member
A Dsama5d2_smc.h20 u32 setup; /* 0x600 SMC Setup Register */ member
A Dsama5d3_smc.h20 u32 setup; /* 0x600 SMC Setup Register */ member
/arch/arm/mach-tegra/
A DMakefile24 obj-y += dt-setup.o
/arch/arm/mach-versal-net/
A DKconfig31 If defined this option is used to setup different space for
/arch/arm/mach-versal2/
A DKconfig39 If defined this option is used to setup different space for
/arch/arm/mach-versal/
A DKconfig31 If defined this option is used to setup different space for

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