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Searched refs:spll_con0 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos5.c898 writel(val, &clk->spll_con0); in exynos5420_system_clock_init()
899 while ((readl(&clk->spll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
A Dclock.c336 r = readl(&clk->spll_con0); in exynos542x_get_pll_clk()
/arch/arm/mach-exynos/include/mach/
A Dclock.h1062 unsigned int spll_con0; member

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