Searched refs:spll_sdiv (Results 1 – 2 of 2) sorted by relevance
76 unsigned spll_sdiv; member
177 .spll_sdiv = 0x2,897 val = set_pll(mem->spll_mdiv, mem->spll_pdiv, mem->spll_sdiv); in exynos5420_system_clock_init()
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