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Searched refs:src_disp10 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock.c1012 sel = readl(&clk->src_disp10); in exynos5420_get_lcd_clk()
1044 sel = (readl(&clk->src_disp10) >> 4) & 0x7; in exynos5800_get_lcd_clk()
1182 cfg = readl(&clk->src_disp10); in exynos5420_set_lcd_clk()
1185 writel(cfg, &clk->src_disp10); in exynos5420_set_lcd_clk()
1209 cfg = readl(&clk->src_disp10) | (0x7 << 4); in exynos5800_set_lcd_clk()
1210 writel(cfg, &clk->src_disp10); in exynos5800_set_lcd_clk()
A Dclock_init_exynos5.c931 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp10); in exynos5420_system_clock_init()
/arch/arm/mach-exynos/include/mach/
A Dclock.h1080 unsigned int src_disp10; /* 0x1002022c */ member

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