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Searched refs:src_disp1_0 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock.c969 sel = readl(&clk->src_disp1_0); in exynos5_get_lcd_clk()
1143 clrsetbits_le32(&clk->src_disp1_0, 0xf, 0x6); in exynos5_set_lcd_clk()
A Dclock_init_exynos5.c772 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp1_0); in exynos5250_system_clock_init()
/arch/arm/mach-exynos/include/mach/
A Dclock.h681 unsigned int src_disp1_0; member

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