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Searched refs:start_addr (Results 1 – 22 of 22) sorted by relevance

/arch/mips/lib/
A Dcache.c111 void __weak flush_cache(ulong start_addr, ulong size) in flush_cache() argument
123 cache_loop(start_addr, start_addr + size, ilsize, in flush_cache()
129 cache_loop(start_addr, start_addr + size, dlsize, HIT_WRITEBACK_INV_D); in flush_cache()
132 cache_loop(start_addr, start_addr + size, slsize, HIT_WRITEBACK_INV_SD); in flush_cache()
135 cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I); in flush_cache()
145 void __weak flush_dcache_range(ulong start_addr, ulong stop) in flush_dcache_range() argument
151 if (start_addr == stop) in flush_dcache_range()
154 cache_loop(start_addr, stop, lsize, HIT_WRITEBACK_INV_D); in flush_dcache_range()
169 if (start_addr == stop) in invalidate_dcache_range()
173 cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD); in invalidate_dcache_range()
[all …]
/arch/xtensa/lib/
A Dcache.c30 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument
32 __flush_invalidate_dcache_range(start_addr, size); in flush_cache()
33 __invalidate_icache_range(start_addr, size); in flush_cache()
42 void flush_dcache_range(ulong start_addr, ulong end_addr) in flush_dcache_range() argument
44 __flush_invalidate_dcache_range(start_addr, end_addr - start_addr); in flush_dcache_range()
/arch/powerpc/cpu/mpc8xxx/
A Dpamu_table.c17 tbl->start_addr[i] = in construct_pamu_addr_table()
20 tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; in construct_pamu_addr_table()
24 tbl->start_addr[i] = in construct_pamu_addr_table()
27 tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; in construct_pamu_addr_table()
32 tbl->start_addr[i] = in construct_pamu_addr_table()
35 tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; in construct_pamu_addr_table()
41 debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); in construct_pamu_addr_table()
A Dfsl_pamu.c384 min_addr = find_min(tbl->start_addr, num_entries); in config_pamu()
432 subwin_size, tbl->start_addr[i] - min_addr, in config_pamu()
/arch/mips/mach-octeon/
A Dcache.c11 void flush_dcache_range(ulong start_addr, ulong stop) in flush_dcache_range() argument
17 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument
21 void invalidate_dcache_range(ulong start_addr, ulong stop) in invalidate_dcache_range() argument
A Dcvmx-bootmem.c1357 int cvmx_bootmem_reserve_memory(u64 start_addr, u64 size, in cvmx_bootmem_reserve_memory() argument
1366 __func__, CAST_ULL(start_addr), CAST_ULL(size), name, flags); in cvmx_bootmem_reserve_memory()
1382 if (addr >= start_addr && addr < start_addr + size) { in cvmx_bootmem_reserve_memory()
1383 reserve_size = size - (addr - start_addr); in cvmx_bootmem_reserve_memory()
1386 } else if (start_addr > addr && in cvmx_bootmem_reserve_memory()
1387 start_addr < (addr + block_size)) { in cvmx_bootmem_reserve_memory()
1388 reserve_size = block_size - (start_addr - addr); in cvmx_bootmem_reserve_memory()
1394 name, (unsigned long long)start_addr, in cvmx_bootmem_reserve_memory()
/arch/arm/mach-rockchip/
A Dsdram.c178 phys_addr_t start_addr = ddr_info->bank[i]; in rockchip_dram_init_banksize() local
188 start_addr = CFG_SYS_SDRAM_BASE + SZ_2M; in rockchip_dram_init_banksize()
227 if (start_addr >= rsrv_start && start_addr < rsrv_end) { in rockchip_dram_init_banksize()
228 if (rsrv_end - start_addr > size) { in rockchip_dram_init_banksize()
234 start_addr = rsrv_end; in rockchip_dram_init_banksize()
238 if (start_addr < rsrv_start) { in rockchip_dram_init_banksize()
239 end_addr = start_addr + size; in rockchip_dram_init_banksize()
255 size = rsrv_start - start_addr; in rockchip_dram_init_banksize()
264 gd->bd->bi_dram[j].start = start_addr; in rockchip_dram_init_banksize()
270 start_addr = rsrv_end; in rockchip_dram_init_banksize()
[all …]
/arch/powerpc/lib/
A Dcache.c23 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument
28 start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1); in flush_cache()
29 end = start_addr + size - 1; in flush_cache()
/arch/arm/mach-mvebu/
A Ddram.c171 u32 start_addr; in dram_ecc_scrubbing() local
190 start_addr = 0; in dram_ecc_scrubbing()
195 start_addr = 0x1000000; in dram_ecc_scrubbing()
196 size -= start_addr; in dram_ecc_scrubbing()
199 mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size - 1, in dram_ecc_scrubbing()
/arch/mips/mach-mtmips/mt7621/tpl/
A Dtpl.c23 static void fill_lock_l2cache(uintptr_t dataptr, ulong start_addr, ulong size) in fill_lock_l2cache() argument
26 ulong end_addr = start_addr + size; in fill_lock_l2cache()
37 for (addr = start_addr; addr < end_addr; addr += slsize) { in fill_lock_l2cache()
/arch/arm/cpu/armv7m/
A Dcache.c139 static int action_cache_range(enum cache_action action, u32 start_addr, in action_cache_range() argument
157 start_addr &= ~(cline_size - 1); in action_cache_range()
160 writel(start_addr, action_reg); in action_cache_range()
162 start_addr += cline_size; in action_cache_range()
A Dmpu.c38 writel(reg_config->start_addr | VALID_REGION | reg_config->region_no, in mpu_config()
/arch/arm/include/asm/
A Domap_sec_common.h37 int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr,
A Darmv7_mpu.h86 uint32_t start_addr; member
/arch/arm/cpu/arm926ejs/mxs/
A Dmxs.c74 void mx28_fixup_vt(uint32_t start_addr) in mx28_fixup_vt() argument
86 vt[i + 8] = start_addr + (4 * i); in mx28_fixup_vt()
/arch/arm/mach-omap2/
A Dsec-common.c212 int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr, in secure_emif_firewall_setup() argument
223 region_num, start_addr, size); in secure_emif_firewall_setup()
227 (start_addr & 0xFFFFFFF0) | (region_num & 0x0F), in secure_emif_firewall_setup()
/arch/arm/cpu/armv7/
A Dmpu_v7r.c71 asm volatile ("mcr p15, 0, %0, c6, c1, 0" : : "r" (rgn->start_addr)); in mpu_config()
/arch/powerpc/include/asm/
A Dfsl_pamu.h91 phys_addr_t start_addr[10]; member
/arch/m68k/lib/
A Dcache.c16 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument
/arch/mips/mach-octeon/include/mach/
A Dcvmx-bootmem.h289 int cvmx_bootmem_reserve_memory(u64 start_addr, u64 size,
/arch/arm/mach-imx/
A Dhab.c767 static bool csf_is_valid(struct ivt *ivt, ulong start_addr, size_t bytes) in csf_is_valid() argument
769 u8 *start = (u8 *)start_addr; in csf_is_valid()
/arch/arm/include/asm/arch-tegra/
A Ddc.h334 uint start_addr; /* _WINBUF_START_ADDR_0 */ member

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