| /arch/arm/mach-socfpga/ |
| A D | reset_manager_s10.c | 294 u32 stat = cpu_has_been_warmreset(); in print_reset_info() local
296 printf("Reset state: %s%s", stat ? "Warm " : "Cold", in print_reset_info()
297 (stat & RSTMGR_STAT_SDMWARMRST) ? "[from SDM] " : ""); in print_reset_info()
299 stat &= ~RSTMGR_STAT_SDMWARMRST; in print_reset_info()
300 if (!stat) { in print_reset_info()
305 n = generic_ffs(stat) - 1; in print_reset_info()
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| A D | scan_manager.c | 50 status = readl(&scan_manager_base->stat); in scan_chain_engine_is_idle()
225 writel(0x02, &scan_manager_base->stat); in scan_mgr_get_fpga_id()
231 writel(0, &scan_manager_base->stat); in scan_mgr_get_fpga_id()
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| A D | fpga_manager.c | 37 val = readl(&fpgamgr_regs->stat); in fpgamgr_get_mode()
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| /arch/arm/mach-k3/am62ax/ |
| A D | am62a7_init.c | 78 u32 stat = readl(CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset() local
80 stat &= RST_CTRL_ESM_ERROR_RST_EN_Z_MASK; in enable_mcu_esm_reset()
81 writel(stat, CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset()
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| /arch/arm/mach-k3/am64x/ |
| A D | am642_init.c | 161 u32 stat = readl(CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset() local
163 stat &= 0xFFFDFFFF; in enable_mcu_esm_reset()
164 writel(stat, CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset()
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| /arch/arm/mach-k3/j722s/ |
| A D | j722s_init.c | 176 u32 stat = readl(CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset() local
178 stat &= RST_CTRL_ESM_ERROR_RST_EN_Z_MASK; in enable_mcu_esm_reset()
179 writel(stat, CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset()
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| /arch/arm/include/asm/arch-armv7/ |
| A D | globaltimer.h | 13 u32 stat; member
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| /arch/arm/mach-socfpga/include/mach/ |
| A D | scan_manager.h | 10 u32 stat; member
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| A D | fpga_manager_gen5.h | 39 u32 stat; /* 0x00 */ member
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| /arch/arm/mach-k3/am62x/ |
| A D | am625_init.c | 88 u32 stat = readl(CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset() local
90 stat &= RST_CTRL_ESM_ERROR_RST_EN_Z_MASK; in enable_mcu_esm_reset()
91 writel(stat, CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset()
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| /arch/arm/mach-rockchip/rk3036/ |
| A D | sdram_rk3036.c | 521 state = readl(&pctl->stat) & PCTL_STAT_MASK; in move_to_config_state()
525 while ((readl(&pctl->stat) & PCTL_STAT_MASK) in move_to_config_state()
536 while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG) in move_to_config_state()
553 state = readl(&pctl->stat) & PCTL_STAT_MASK; in move_to_access_state()
557 while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS) in move_to_access_state()
562 while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG) in move_to_access_state()
567 while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS) in move_to_access_state()
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| /arch/arm/include/asm/arch-lpc32xx/ |
| A D | i2c.h | 12 u32 stat; member
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| A D | emc.h | 50 } stat[4]; member
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| /arch/arm/mach-k3/am62px/ |
| A D | am62p5_init.c | 136 u32 stat = readl(CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset() local
138 stat &= RST_CTRL_ESM_ERROR_RST_EN_Z_MASK; in enable_mcu_esm_reset()
139 writel(stat, CTRLMMR_MCU_RST_CTRL); in enable_mcu_esm_reset()
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| /arch/arm/include/asm/arch-sunxi/ |
| A D | rsb.h | 20 u32 stat; /* 0x0c */ member
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| A D | dram_sun9i.h | 45 u32 stat; /* 0x04 operating mode status register */ member
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| /arch/arm/mach-keystone/include/mach/ |
| A D | clock_defs.h | 33 u32 stat; /* 3c */ member
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| /arch/arm/cpu/arm926ejs/mxs/ |
| A D | Makefile | 29 sz=`expr \`stat -c "%s" $^\` + 64 + 3904 + 128` ; \
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| /arch/arm/include/asm/ |
| A D | omap_mmc.h | 59 unsigned int stat; /* 0x130 */ member
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| /arch/sandbox/cpu/ |
| A D | os.c | 634 struct stat buf; in os_dirent_ls()
698 if (!stat(fname, &buf)) in os_dirent_ls()
736 struct stat buf; in os_get_filesize()
739 ret = stat(fname, &buf); in os_get_filesize()
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| /arch/arm/include/asm/arch-rockchip/ |
| A D | ddr_rk3368.h | 21 u32 stat; member
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| A D | ddr_rk3288.h | 12 u32 stat; member
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| A D | sdram_rk3036.h | 11 u32 stat; member
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| /arch/x86/include/asm/ |
| A D | intel_opregion.h | 147 u32 stat; /* Offset 182 State Indicator */ member
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| /arch/arm/dts/ |
| A D | sun7i-a20-olimex-som204-evb.dts | 50 label = "a20-som204-evb:green:stat";
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