| /arch/mips/mach-ath79/qca953x/ |
| A D | lowlevel_init.S | 81 #define MK_PLL_DDR_DIT_FRAC(max, min, step, cnt) \ argument 85 PLL_DDR_DIT_FRAC_STEP(step) | \ 87 #define MK_PLL_CPU_DIT_FRAC(max, min, step, cnt) \ argument 91 PLL_CPU_DIT_FRAC_STEP(step) | \
|
| /arch/arm/dts/ |
| A D | armada-xp-db-xc3-24g4xg-u-boot.dtsi | 11 nand-ecc-step-size = <512>;
|
| A D | am335x-pocketbeagle.dts | 189 ti,chan-step-avg = <16 16 16 16 16 16 16 16>; 190 ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>; 191 ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
|
| A D | ns-board.dts | 45 nand-ecc-step-size = <512>;
|
| A D | imx6q.dtsi | 47 clock-names = "arm", "pll2_pfd2_396m", "step", 84 clock-names = "arm", "pll2_pfd2_396m", "step", 119 clock-names = "arm", "pll2_pfd2_396m", "step", 154 clock-names = "arm", "pll2_pfd2_396m", "step",
|
| A D | sun8i-r16-nintendo-nes-classic.dts | 41 nand-ecc-step-size = <1024>;
|
| A D | bcm96753ref.dts | 74 nand-ecc-step-size = <512>;
|
| A D | bcm968580xref.dts | 72 nand-ecc-step-size = <512>;
|
| A D | bcm968360bg.dts | 72 nand-ecc-step-size = <512>;
|
| A D | imx6dl.dtsi | 42 clock-names = "arm", "pll2_pfd2_396m", "step", 75 clock-names = "arm", "pll2_pfd2_396m", "step",
|
| A D | zynqmp-zc1751-xm017-dc3.dts | 142 nand-ecc-step-size = <1024>; 178 nand-ecc-step-size = <1024>;
|
| A D | imx8ulp.dtsi | 367 fsl,tuning-step = <2>; 382 fsl,tuning-step = <2>; 397 fsl,tuning-step = <2>;
|
| A D | imx8qm-cgtqmx8.dts | 390 fsl,tuning-step= <2>; 403 fsl,tuning-step= <2>;
|
| A D | imx7-cm.dts | 238 tuning-step = <2>; 256 fsl,tuning-step = <2>;
|
| A D | ca-presidio-engboard.dts | 65 nand-ecc-step-size = <1024>; /* Must be 1024 */
|
| A D | ac5-98dx35xx-atl-x240.dts | 50 nand-ecc-step-size = <512>;
|
| A D | imxrt1020.dtsi | 90 fsl,tuning-step= <2>;
|
| /arch/arm/mach-nexell/ |
| A D | clock.c | 228 static inline void clk_dev_rate(void *base, int step, int src, int div) in clk_dev_rate() argument 233 val = readl(®->con_gen[step << 1]); in clk_dev_rate() 238 writel(val, ®->con_gen[step << 1]); in clk_dev_rate() 241 static inline void clk_dev_inv(void *base, int step, int inv) in clk_dev_inv() argument 244 unsigned int val = readl(®->con_gen[step << 1]) & ~(1 << 1); in clk_dev_inv() 247 writel(val, ®->con_gen[step << 1]); in clk_dev_inv() 614 int step, div[2] = { 0, }; in clk_round_rate() local 622 step = peri->clk_step; in clk_round_rate() 656 for (i = 0; step > i ; i++) in clk_round_rate() 681 step = 1; in clk_round_rate()
|
| /arch/mips/dts/ |
| A D | brcm,bcm968380gerg.dts | 61 nand-ecc-step-size = <512>;
|
| A D | ci20.dts | 69 nand-ecc-step-size = <1024>;
|
| A D | comtrend,vr-3032u.dts | 109 nand-ecc-step-size = <512>;
|
| /arch/arm/mach-imx/mx6/ |
| A D | soc.c | 265 u32 val, step, old, reg = readl(&anatop->reg_core); in set_ldo_voltage() local 296 step = abs(val - old); in set_ldo_voltage() 297 if (step == 0) in set_ldo_voltage() 307 udelay(3 * step); in set_ldo_voltage()
|
| /arch/arm/mach-omap2/omap5/ |
| A D | hw_data.c | 280 .step = 10000, /* 10 mV represented in uV */ 295 .step = 10000, /* 10 mV represented in uV */ 310 .step = 5000, /* 5 mV represented in uV */ 326 .step = 5000, /* 5 mV represented in uV */
|
| /arch/sandbox/dts/ |
| A D | sandbox_pmic.dtsi | 62 * VAL2REG(min, step, value) [uV/uA]
|
| /arch/arm/mach-uniphier/dram/ |
| A D | umc-pxs2.c | 95 static void ddrphy_dqs_delay_fixup(void __iomem *phy_base, int nr_dx, int step) in ddrphy_dqs_delay_fixup() argument 106 rdqsd = clamp(rdqsd + step, 0U, 0xffU); in ddrphy_dqs_delay_fixup()
|