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Searched refs:timing_cfg_0 (Results 1 – 2 of 2) sorted by relevance

/arch/powerpc/cpu/mpc83xx/
A Dspd_sdram.c474 ddr->timing_cfg_0 = (0 in spd_sdram()
480 debug("DDR: timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0); in spd_sdram()
/arch/powerpc/include/asm/
A Dimmap_83xx.h288 u32 timing_cfg_0; /* SDRAM Timing Configuration 0 */ member

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