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Searched refs:timing_data (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h85 unsigned timing_data; member
A Ddmc_init_ddr3.c128 writel(mem->timing_data, &dmc->timingdata); in ddr3_mem_ctrl_init()
610 writel(mem->timing_data, &drex0->timingdata0); in ddr3_mem_ctrl_init()
611 writel(mem->timing_data, &drex1->timingdata0); in ddr3_mem_ctrl_init()
A Dclock_init_exynos5.c189 .timing_data = 0x3630580b,
292 .timing_data = 0x3630580b,
395 .timing_data = 0x3630580b,

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