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Searched refs:tpr1 (Results 1 – 11 of 11) sorted by relevance

/arch/arm/mach-at91/
A Dmpddrc.c61 writel(mpddr_value->tpr1, &mpddr->tpr1); in ddr2_init()
170 writel(mpddr_value->tpr1, &mpddr->tpr1); in ddr3_init()
252 writel(mpddr_value->tpr1, &mpddr->tpr1); in lpddr2_init()
/arch/arm/mach-at91/include/mach/
A Datmel_mpddrc.h18 u32 tpr1; member
35 u32 tpr1; /* 0x10: Timing Parameter 1 Register */ member
/arch/arm/include/asm/arch-sunxi/
A Ddram_sun4i.h21 u32 tpr1; /* 0x18 dram timing parameters register 1 */ member
80 u32 tpr1; member
A Ddram_sun55i_a523.h126 u32 tpr1; member
A Ddram_sun50i_a133.h208 uint32_t tpr1; member
A Ddram_sun8i_a23.h29 u32 tpr1; member
/arch/arm/mach-sunxi/
A Ddram_sun8i_a23.c44 .tpr1 = 0x18082356,
132 writel((dram_para.tpr1 & 0x1fffffff), &mctl_phy->ptr3); in mctl_init()
A Ddram_sun4i.c640 writel(para->tpr1, &dram->tpr1); in dramc_init_helper()
A Ddram_sun55i_a523.c158 (para->tpr1 & 0x1f1f1f1f) ? para->tpr1 : 0x04040404; in mctl_phy_configure_odt()
1485 .tpr1 = CONFIG_DRAM_SUNXI_TPR1,
A Ddram_sun50i_a133.c784 mctl_mr_write_lpddr4(22, para->tpr1); in mctl_dfi_init()
1173 .tpr1 = CONFIG_DRAM_SUNXI_TPR1,
/arch/arm/mach-sunxi/dram_timings/
A Da133_lpddr4.c89 writel(para->tpr1 << 16 | para->mr14, &mctl_ctl->init[7]); in mctl_set_timing_params()

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