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Searched refs:tpr2 (Results 1 – 13 of 13) sorted by relevance

/arch/arm/mach-at91/
A Dmpddrc.c62 writel(mpddr_value->tpr2, &mpddr->tpr2); in ddr2_init()
171 writel(mpddr_value->tpr2, &mpddr->tpr2); in ddr3_init()
253 writel(mpddr_value->tpr2, &mpddr->tpr2); in lpddr2_init()
/arch/arm/mach-at91/include/mach/
A Datmel_mpddrc.h19 u32 tpr2; member
36 u32 tpr2; /* 0x14: Timing Parameter 2 Register */ member
/arch/arm/include/asm/arch-sunxi/
A Ddram_sun4i.h22 u32 tpr2; /* 0x1c dram timing parameters register 2 */ member
81 u32 tpr2; member
A Ddram_sun55i_a523.h127 u32 tpr2; member
A Ddram_sun50i_h616.h157 u32 tpr2; member
A Ddram_sun50i_a133.h209 uint32_t tpr2; member
A Ddram_sun8i_a23.h30 u32 tpr2; member
/arch/arm/mach-sunxi/dram_timings/
A Dh616_ddr3_1333.c56 if (para->tpr2 & 0x100) { in mctl_set_timing_params()
/arch/arm/mach-sunxi/
A Ddram_sun8i_a23.c45 .tpr2 = 0x00034156,
134 (dram_para.tpr2 & 0x0003ffff), &mctl_phy->ptr4); in mctl_init()
A Ddram_sun50i_h616.c850 if (para->tpr2 & 1) { in mctl_phy_ca_bit_delay_compensation()
877 if (para->tpr2 & 1) { in mctl_phy_ca_bit_delay_compensation()
925 if (para->tpr2 & 0x100) { in mctl_phy_init()
934 if (para->tpr2 & 0x100) { in mctl_phy_init()
1055 if (para->tpr2 & 0x100) { in mctl_phy_init()
1336 .tpr2 = CONFIG_DRAM_SUNXI_TPR2,
A Ddram_sun4i.c641 writel(para->tpr2, &dram->tpr2); in dramc_init_helper()
A Ddram_sun50i_a133.c471 val = para->tpr2; in mctl_phy_ca_bit_delay_compensation()
1174 .tpr2 = CONFIG_DRAM_SUNXI_TPR2,
A Ddram_sun55i_a523.c1486 .tpr2 = CONFIG_DRAM_SUNXI_TPR2,

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