Searched refs:tpr2 (Results 1 – 13 of 13) sorted by relevance
62 writel(mpddr_value->tpr2, &mpddr->tpr2); in ddr2_init()171 writel(mpddr_value->tpr2, &mpddr->tpr2); in ddr3_init()253 writel(mpddr_value->tpr2, &mpddr->tpr2); in lpddr2_init()
19 u32 tpr2; member36 u32 tpr2; /* 0x14: Timing Parameter 2 Register */ member
22 u32 tpr2; /* 0x1c dram timing parameters register 2 */ member81 u32 tpr2; member
127 u32 tpr2; member
157 u32 tpr2; member
209 uint32_t tpr2; member
30 u32 tpr2; member
56 if (para->tpr2 & 0x100) { in mctl_set_timing_params()
45 .tpr2 = 0x00034156,134 (dram_para.tpr2 & 0x0003ffff), &mctl_phy->ptr4); in mctl_init()
850 if (para->tpr2 & 1) { in mctl_phy_ca_bit_delay_compensation()877 if (para->tpr2 & 1) { in mctl_phy_ca_bit_delay_compensation()925 if (para->tpr2 & 0x100) { in mctl_phy_init()934 if (para->tpr2 & 0x100) { in mctl_phy_init()1055 if (para->tpr2 & 0x100) { in mctl_phy_init()1336 .tpr2 = CONFIG_DRAM_SUNXI_TPR2,
641 writel(para->tpr2, &dram->tpr2); in dramc_init_helper()
471 val = para->tpr2; in mctl_phy_ca_bit_delay_compensation()1174 .tpr2 = CONFIG_DRAM_SUNXI_TPR2,
1486 .tpr2 = CONFIG_DRAM_SUNXI_TPR2,
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