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Searched refs:usb1_pll_480_ctrl (Results 1 – 6 of 6) sorted by relevance

/arch/arm/include/asm/arch-imx8ulp/
A Dimx-regs.h127 u32 usb1_pll_480_ctrl; /* 0x0a0 */ member
/arch/arm/mach-imx/imx8ulp/
A Dclock.c320 if (!(readl(&usbphy->usb1_pll_480_ctrl) & PLL_USB_LOCK_MASK)) { in enable_usb_pll()
353 if (readl(&usbphy->usb1_pll_480_ctrl) & in enable_usb_pll()
/arch/arm/mach-imx/mx7ulp/
A Dscg.c738 if (!(readl(&usbphy->usb1_pll_480_ctrl) & PLL_USB_LOCK_MASK)) { in scg_enable_usb_pll()
771 if (readl(&usbphy->usb1_pll_480_ctrl) & in scg_enable_usb_pll()
/arch/arm/mach-imx/mx6/
A Dclock.c1260 if ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
1267 while ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h792 u32 usb1_pll_480_ctrl; /* 0x010 */ member
/arch/arm/include/asm/arch-mx7ulp/
A Dimx-regs.h1098 u32 usb1_pll_480_ctrl; /* 0x0a0 */ member

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