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Searched refs:virt (Results 1 – 25 of 78) sorted by relevance

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/arch/arm/mach-apple/
A Dboard.c24 .virt = 0x200000000,
32 .virt = 0x380000000,
40 .virt = 0x500000000,
48 .virt = 0x680000000,
56 .virt = 0x6a0000000,
64 .virt = 0x6c0000000,
72 .virt = 0x800000000,
93 .virt = 0x280000000,
101 .virt = 0x380000000,
109 .virt = 0x580000000,
[all …]
/arch/arm/mach-socfpga/
A Dmmu-arm64_s10.c16 .virt = 0x00000000UL,
23 .virt = 0x10808000UL,
31 .virt = 0x20000000UL,
39 .virt = 0x440000000UL,
47 .virt = 0x4400000000UL,
55 .virt = 0x80000000UL,
62 .virt = 0x880000000UL,
85 .virt = 0x0UL,
92 .virt = 0x80000000UL,
100 .virt = 0xF7000000UL,
[all …]
/arch/arm/mach-exynos/
A Dmmu-arm64.c14 .virt = 0x10000000UL,
21 .virt = 0x40000000UL,
37 .virt = 0x10000000UL,
45 .virt = 0x40000000UL,
52 .virt = 0x80000000UL,
70 .virt = 0x10000000UL,
78 .virt = 0x40000000UL,
85 .virt = 0x80000000UL,
104 .virt = 0x02000000UL,
112 .virt = 0x10000000UL,
[all …]
/arch/arm/mach-mvebu/alleycat5/
A Dcpu.c28 .virt = CFG_SYS_SDRAM_BASE,
35 .virt = 0xa0000000,
42 .virt = 0x100000,
48 .virt = 0x7F000000,
54 .virt = 0x7F800000,
60 .virt = 0x7FC00000,
66 .virt = 0x7FC80000,
72 .virt = 0x7FD00000,
79 .virt = 0x7FE80000,
85 .virt = 0x7FFF0000,
[all …]
/arch/arm/mach-renesas/
A Dmemmap-gen3.c16 .virt = 0x0UL,
23 .virt = 0x40000000UL,
29 .virt = 0x47E00000UL,
35 .virt = 0xc0000000UL,
42 .virt = 0x100000000UL,
63 gen3_mem_map[i].virt = 0x0ULL; in enable_caches()
87 gen3_mem_map[i].virt = 0x40000000ULL; in enable_caches()
98 gen3_mem_map[i].virt = start; in enable_caches()
107 gen3_mem_map[i].virt = 0xc0000000ULL; in enable_caches()
128 gen3_mem_map[i].virt = start; in enable_caches()
[all …]
A Dmemmap-rzg2l.c21 .virt = 0x0UL,
28 .virt = 0x40000000UL,
34 .virt = 0x47E00000UL,
51 i, map[i].virt, map[i].phys, map[i].size, map[i].attrs)
59 rzg2l_mem_map[i].virt = 0x0ULL; in enable_caches()
80 rzg2l_mem_map[i].virt = 0x40000000ULL; in enable_caches()
92 rzg2l_mem_map[i].virt = start; in enable_caches()
103 rzg2l_mem_map[i].virt = 0; in enable_caches()
/arch/arm/mach-k3/arm64/
A Darm64-mmu.c17 .virt = 0x0UL,
24 .virt = 0x80000000UL,
30 .virt = 0xa0000000UL,
36 .virt = 0x880000000UL,
42 .virt = 0x500000000UL,
/arch/arm/mach-stm32mp/stm32mp2/
A Darm64-mmu.c20 .virt = 0x10000000UL,
28 .virt = 0x20000000UL,
36 .virt = 0x40000000UL,
44 .virt = 0x60000000UL,
57 .virt = CONFIG_TEXT_BASE,
/arch/arm/mach-versal-net/
A Dcpu.c30 .virt = 0x80000000UL,
37 .virt = 0xf0000000UL,
44 .virt = 0x400000000UL,
51 .virt = 0x600000000UL,
57 .virt = 0xe00000000UL,
75 versal_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
/arch/arm/mach-versal2/
A Dcpu.c30 .virt = 0x80000000UL,
37 .virt = 0xf0000000UL,
44 .virt = 0x400000000UL,
51 .virt = 0x600000000UL,
57 .virt = 0xe00000000UL,
75 versal2_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
/arch/arm/mach-octeontx2/
A Dcpu.c22 .virt = 0x800000000000UL,
28 .virt = 0x840000000000UL,
34 .virt = 0x880000000000UL,
40 .virt = 0x8c0000000000UL,
56 otx2_mem_map[banks].virt = dram_start; in mem_map_fill()
/arch/arm/mach-bcm283x/
A Dinit.c25 .virt = 0x00000000UL,
31 .virt = 0x3f000000UL,
45 .virt = 0x00000000UL,
51 .virt = 0xfc000000UL,
58 .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
73 .virt = 0x00000000UL,
80 .virt = 0x1000000000UL,
88 .virt = 0x107c000000UL,
119 mem_map[i].virt = pd[i].virt; in _rpi_update_mem_map()
/arch/arm/mach-versal/
A Dcpu.c34 .virt = 0x80000000UL,
41 .virt = 0xf0000000UL,
48 .virt = 0x400000000UL,
55 .virt = 0x600000000UL,
61 .virt = 0xe00000000UL,
75 versal_mem_map[banks].virt = 0xffe00000UL; in mem_map_fill()
97 versal_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
/arch/arm/mach-octeontx/
A Dcpu.c22 .virt = 0x800000000000UL,
28 .virt = 0x840000000000UL,
34 .virt = 0x880000000000UL,
51 otx_mem_map[banks].virt = 0x8c0000000000UL; in mem_map_fill()
60 otx_mem_map[banks].virt = dram_start; in mem_map_fill()
/arch/arm/mach-uniphier/arm64/
A Dmem_map.c13 .virt = 0x00000000,
21 .virt = 0x80000000,
35 uniphier_mem_map[1].virt = dram_base; in uniphier_mem_map_init()
/arch/arm/mach-meson/
A Dboard-a1.c31 .virt = 0x00000000UL,
37 .virt = 0x80000000UL,
48 .virt = 0xFFE00000UL,
/arch/arm/mach-zynqmp/
A Dcpu.c49 .virt = 0x80000000UL,
56 .virt = 0xf8000000UL,
63 .virt = 0x400000000UL,
70 .virt = 0x1000000000UL,
84 zynqmp_mem_map[banks].virt = 0xffe00000UL; in mem_map_fill()
98 zynqmp_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
/arch/arm/mach-mvebu/armada8k/
A Dcpu.c32 .virt = 0x0UL,
41 .virt = ATF_REGION_END,
49 .virt = MMIO_REGS_PHY_BASE,
/arch/arm/mach-rockchip/rk3576/
A Drk3576.c40 .virt = 0x20000000UL,
48 .virt = 0x3fe70000UL,
56 .virt = 0x40000000UL,
63 .virt = 0x900000000UL,
/arch/arm/mach-histb/
A Dsysmap-histb.c12 .virt = 0x0UL, /* DRAM */
18 .virt = 0x80000000UL, /* Peripheral block */
/arch/arm/mach-owl/
A Dsysmap-owl.c13 .virt = 0x0UL, /* DDR */
19 .virt = 0xE0000000UL, /* Peripheral block */
/arch/arm/mach-bcmbca/bcm4908/
A Dmmu_table.c10 .virt = 0x00000000UL,
18 .virt = 0xff800000UL,
/arch/arm/mach-bcmbca/bcm4912/
A Dmmu_table.c10 .virt = 0x00000000UL,
18 .virt = 0xff800000UL,
/arch/arm/mach-bcmbca/bcm63146/
A Dmmu_table.c10 .virt = 0x00000000UL,
18 .virt = 0xff800000UL,
/arch/arm/mach-bcmbca/bcm63158/
A Dmmu_table.c10 .virt = 0x00000000UL,
18 .virt = 0xff800000UL,

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