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Searched refs:vpll_mdiv (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h59 unsigned vpll_mdiv; member
A Dclock_init_exynos5.c155 .vpll_mdiv = 0xd7,
279 .vpll_mdiv = 0x96,
382 .vpll_mdiv = 0x96,
663 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5250_system_clock_init()
883 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5420_system_clock_init()

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