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Searched refs:vpll_pdiv (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h60 unsigned vpll_pdiv; member
A Dclock_init_exynos5.c156 .vpll_pdiv = 0x3,
280 .vpll_pdiv = 0x3,
383 .vpll_pdiv = 0x3,
589 writel(mem->vpll_pdiv * PLL_X_LOCK_FACTOR, &clk->vpll_lock); in exynos5250_system_clock_init()
663 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5250_system_clock_init()
799 writel(mem->vpll_pdiv * PLL_LOCK_FACTOR, &clk->vpll_lock); in exynos5420_system_clock_init()
883 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5420_system_clock_init()

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