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Searched refs:vpll_sdiv (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h61 unsigned vpll_sdiv; member
A Dclock_init_exynos5.c157 .vpll_sdiv = 0x2,
281 .vpll_sdiv = 0x2,
384 .vpll_sdiv = 0x2,
663 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5250_system_clock_init()
883 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5420_system_clock_init()

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