Home
last modified time | relevance | path

Searched refs:chip (Results 1 – 25 of 44) sorted by relevance

12

/board/cssi/cmpc885/
A Dnand.c29 struct nand_chip *chip = mtd_to_nand(mtdinfo); in nand_hwcontrol() local
36 out_8(chip->IO_ADDR_W, cmd); in nand_hwcontrol()
39 int board_nand_init(struct nand_chip *chip) in board_nand_init() argument
41 chip->chip_delay = 60; in board_nand_init()
42 chip->ecc.mode = NAND_ECC_SOFT; in board_nand_init()
43 chip->cmd_ctrl = nand_hwcontrol; in board_nand_init()
A Dcmpc885.env7 update=echo 'Updating ubi image'; if tftp $loadaddr $ubifile; then nand erase.chip; nand write $loa…
/board/cssi/cmpcpro/
A Dnand.c26 struct nand_chip *chip = mtd_to_nand(mtdinfo); in nand_hwcontrol() local
33 out_8(chip->IO_ADDR_W, cmd); in nand_hwcontrol()
A Dcmpcpro.env8 …age'; mw.w 90000040 0x000E 1; if tftp $loadaddr $ubifile; then nand erase.chip; nand write $loadad…
/board/BuR/common/
A Dbur_common.h21 int brdefaultip_setup(int bus, int chip);
A Dcommon.c47 int brdefaultip_setup(int bus, int chip) in brdefaultip_setup() argument
54 rc = i2c_get_chip_for_busnum(bus, chip, 2, &i2cdev); in brdefaultip_setup()
/board/sunxi/
A DMakefile14 obj-$(CONFIG_CHIP_DIP_SCAN) += chip.o
/board/freescale/mx6memcal/
A DKconfig79 int "DDR chip selects"
83 Select the number of chip selects used in your board design
106 bool "Micron MT41K512M16TNA 512Mx16 (1GiB/chip)"
110 bool "Micron MT41K128M16JT 128Mx16 (256 MiB/chip)"
114 bool "Hynix H5TQ4G63AFR 256Mx16 (512 MiB/chip)"
118 bool "Hynix H5TQ2G63DFR 128Mx16 (256 MiB/chip)"
122 bool "Micron MT42L256M32D2LG LPDDR2 256Mx32 (1GiB/chip)"
126 bool "Micron MT29PZZZ4D4BKESK multi-chip 512MiB LPDDR2/4GiB eMMC"
188 This is used to compensate for board/chip delays.
198 This is used to compensate for board/chip delays.
/board/gateworks/gw_ventana/
A Deeprom.c50 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) in gsc_i2c_read() argument
58 dev = i2c_get_dev(BOARD_EEPROM_BUSNO, chip); in gsc_i2c_read()
74 ret = i2c_read(chip, addr, alen, buf, len); in gsc_i2c_read()
78 debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, in gsc_i2c_read()
87 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) in gsc_i2c_write() argument
95 dev = i2c_get_dev(BOARD_EEPROM_BUSNO, chip); in gsc_i2c_write()
109 ret = i2c_write(chip, addr, alen, buf, len); in gsc_i2c_write()
113 debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, in gsc_i2c_write()
A Deeprom.h151 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
152 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
/board/siemens/draco/
A Dboard.c105 printf("device: \t'%s'\n", settings.chip.sdevname); in print_chip_data()
106 printf("hw version: \t'%s'\n", settings.chip.shwver); in print_chip_data()
158 if (siemens_ee_read_data(SIEMENS_EE_ADDR_CHIP, (uchar *)&settings.chip, in draco_read_eeprom()
159 sizeof(settings.chip))) in draco_read_eeprom()
175 if (MAGIC_CHIP == settings.chip.magic) in draco_read_eeprom()
A Dboard.h48 struct chip_data chip; member
/board/firefly/roc-pc-rk3399/
A DMAINTAINERS2 M: Levin Du <djw@t-chip.com.cn>
/board/traverse/common/
A Dten64_controller.c101 struct dm_i2c_chip *chip = dev_get_parent_plat(ucdev); in ten64_controller_send_recv_command() local
111 command_message.addr = chip->chip_addr; in ten64_controller_send_recv_command()
122 return_message.addr = chip->chip_addr; in ten64_controller_send_recv_command()
/board/Marvell/db-88f6820-gp/
A Ddb-88f6820-gp.c42 u8 chip; member
144 i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1); in board_init()
/board/out4/o4-imx6ull-nano/
A DKconfig21 bool "K4B4G1646D-BCMA 256Mx16 (512 MiB/chip)"
27 bool "MT41K256M16HA-125:E 256Mx16 (512 MiB/chip)"
/board/samsung/common/
A Dexynos5-dt-types.c116 struct udevice *dev, *chip; in odroid_get_type_str() local
137 ret = dm_i2c_probe(dev, 0x40, 0x0, &chip); in odroid_get_type_str()
/board/cssi/mcr3000/
A Dmcr3000.env14 update=echo 'Updating ubi image'; if tftp 0x2000 $ubifile; then nand erase.chip; nand write 0x2000 …
/board/CZ.NIC/turris_omnia/
A Dturris_omnia.c122 struct udevice *chip; in omnia_mcu_read() local
124 chip = omnia_get_i2c_chip("MCU", OMNIA_I2C_MCU_CHIP_ADDR, in omnia_mcu_read()
126 if (!chip) in omnia_mcu_read()
129 return dm_i2c_read(chip, cmd, buf, len); in omnia_mcu_read()
134 struct udevice *chip; in omnia_mcu_write() local
136 chip = omnia_get_i2c_chip("MCU", OMNIA_I2C_MCU_CHIP_ADDR, in omnia_mcu_write()
138 if (!chip) in omnia_mcu_write()
141 return dm_i2c_write(chip, cmd, buf, len); in omnia_mcu_write()
/board/ti/common/
A DKconfig14 hex "Board EEPROM's I2C chip address"
/board/congatec/conga-qeval20-qa3-e3845/
A DREADME12 Super-IO chip connected on the congatec Qseven 2.0 evaluation carrier
/board/freescale/ls1012ardb/
A DREADME22 -QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
63 -QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
/board/freescale/ls1088a/
A DREADME49 chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default
115 chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default
/board/freescale/ls1021aiot/
A DREADME13 - Soldered DDR chip
/board/anbernic/rgxx3_rk3566/
A Drgxx3-rk3566.c400 struct udevice *chip; in rgxx3_detect_regulator() local
416 1, &chip); in rgxx3_detect_regulator()
420 ret = dm_i2c_read(chip, 0, &val, 1); in rgxx3_detect_regulator()

Completed in 60 milliseconds

12