Searched refs:ddr2 (Results 1 – 9 of 9) sorted by relevance
| /board/gardena/smart-gateway-at91sam/ |
| A D | spl.c | 80 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
82 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
84 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
90 ddr2->rtr = 0x411; in ddr2_conf()
92 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
101 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
106 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
117 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
120 ddr2_conf(&ddr2); in at91_mem_init()
134 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in at91_mem_init()
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| /board/atmel/at91sam9m10g45ek/ |
| A D | at91sam9m10g45ek.c | 97 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
99 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
101 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
106 ddr2->rtr = 0x24b; in ddr2_conf()
108 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */ in ddr2_conf()
117 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
122 ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | in ddr2_conf()
130 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
132 ddr2_conf(&ddr2); in at91_mem_init()
137 ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); in at91_mem_init()
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| /board/atmel/sama5d3_xplained/ |
| A D | sama5d3_xplained.c | 139 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
141 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
143 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
155 ddr2->rtr = 0x411; in ddr2_conf()
157 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
166 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
171 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
180 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
182 ddr2_conf(&ddr2); in at91_mem_init()
189 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in at91_mem_init()
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| /board/atmel/at91sam9n12ek/ |
| A D | at91sam9n12ek.c | 138 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
140 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
142 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
148 ddr2->rtr = 0x411; in ddr2_conf()
150 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
159 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
164 ddr2->tpr2 = (2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | in ddr2_conf()
174 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
177 ddr2_conf(&ddr2); in at91_mem_init()
191 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in at91_mem_init()
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| /board/atmel/sama5d4_xplained/ |
| A D | sama5d4_xplained.c | 152 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
154 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
156 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
164 ddr2->rtr = 0x2b0; in ddr2_conf()
166 ddr2->tpr0 = (8 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
175 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
180 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
189 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
191 ddr2_conf(&ddr2); in at91_mem_init()
198 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in at91_mem_init()
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| /board/atmel/at91sam9x5ek/ |
| A D | at91sam9x5ek.c | 151 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
153 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
155 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
161 ddr2->rtr = 0x411; in ddr2_conf()
163 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
172 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
177 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
188 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
191 ddr2_conf(&ddr2); in at91_mem_init()
205 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in at91_mem_init()
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| /board/atmel/sama5d4ek/ |
| A D | sama5d4ek.c | 138 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
140 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
142 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
149 ddr2->rtr = 0x2b0; in ddr2_conf()
151 ddr2->tpr0 = (8 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
160 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
165 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
174 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
178 ddr2_conf(&ddr2); in at91_mem_init()
198 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in at91_mem_init()
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| /board/atmel/sama5d3xek/ |
| A D | sama5d3xek.c | 205 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
207 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
209 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
221 ddr2->rtr = 0x411; in ddr2_conf()
223 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
232 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
237 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
246 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
248 ddr2_conf(&ddr2); in at91_mem_init()
255 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in at91_mem_init()
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| /board/siemens/corvus/ |
| A D | board.c | 159 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
161 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
163 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
168 ddr2->rtr = 0x24b; in ddr2_conf()
170 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */ in ddr2_conf()
179 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
184 ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | in ddr2_conf()
192 struct atmel_mpddrc_config ddr2; in at91_mem_init() local
194 ddr2_conf(&ddr2); in at91_mem_init()
199 ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); in at91_mem_init()
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