| /board/mikrotik/crs3xx-98dx3236/ |
| A D | MAINTAINERS | 13 F: configs/crs305-1g-4s-bit_defconfig 14 F: arch/arm/dts/armada-xp-crs305-1g-4s.dts 15 F: arch/arm/dts/armada-xp-crs305-1g-4s-bit.dts 22 F: configs/crs326-24g-2s-bit_defconfig 23 F: arch/arm/dts/armada-xp-crs326-24g-2s.dts 24 F: arch/arm/dts/armada-xp-crs326-24g-2s-bit.dts 30 F: configs/crs328-4c-20s-4s_defconfig 31 F: configs/crs328-4c-20s-4s-bit_defconfig 32 F: arch/arm/dts/armada-xp-crs328-4c-20s-4s.dts 33 F: arch/arm/dts/armada-xp-crs328-4c-20s-4s-bit.dts
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| /board/aspeed/ibex_ast2700/ |
| A D | fmc_hdr.c | 18 uint32_t t, s, o; in fmc_hdr_get_prebuilt() local 36 s = body->pbs[i].size; in fmc_hdr_get_prebuilt() 40 o += s; in fmc_hdr_get_prebuilt() 45 if (t == 0 && s == 0) in fmc_hdr_get_prebuilt() 51 *size = s; in fmc_hdr_get_prebuilt() 57 o += s; in fmc_hdr_get_prebuilt()
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| /board/cadence/xtfpga/ |
| A D | xtfpga.c | 93 char *s = env_get("ethaddr"); in misc_init_r() local 94 if (s == 0) { in misc_init_r() 96 char s[] = __stringify(CFG_ETHBASE); in misc_init_r() local 99 sprintf(&s[15], "%02x", x); in misc_init_r() 100 env_set("ethaddr", s); in misc_init_r()
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| /board/freescale/t208xrdb/ |
| A D | t2080_nand_rcw.cfg | 5 #SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s 12 #SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s 15 #SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
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| A D | t2080_sd_rcw.cfg | 5 #SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s 12 #SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s 15 #SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
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| A D | t2080_spi_rcw.cfg | 5 #SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s 12 #SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s 15 #SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
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| /board/Marvell/octeon_nic23/ |
| A D | board.c | 36 } s; member 51 } s; member 89 } s; member 274 pf0_flag = stopreq.s.pf0_stopreq; in octeon_board_restore_pf() 275 pf1_flag = stopreq.s.pf1_stopreq; in octeon_board_restore_pf() 287 cfg_rd.s.addr = (0 << 24) | 0x0; in octeon_board_restore_pf() 290 pci_cfgspace_reg0[0] = cfg_rd.s.data; in octeon_board_restore_pf() 300 cfg_rd.s.addr = (1 << 24) | 0x0; in octeon_board_restore_pf() 303 pci_cfgspace_reg0[1] = cfg_rd.s.data; in octeon_board_restore_pf() 318 cfg_rd.s.addr = (pf_num << 24) | 0x0; in octeon_board_restore_pf() [all …]
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| /board/atmel/common/ |
| A D | video_display.c | 31 const char *s; in at91_video_show_board_info() local 72 for (s = buf, i = 0; i < len; s++, i++) in at91_video_show_board_info() 73 vidconsole_put_char(con, *s); in at91_video_show_board_info()
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| /board/BuS/eb_cpu5282/ |
| A D | eb_cpu5282.c | 135 char *s; in hw_watchdog_init() local 139 s = env_get("watchdog"); in hw_watchdog_init() 140 if (s != NULL) in hw_watchdog_init() 141 if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0)) in hw_watchdog_init()
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| /board/freescale/t208xqds/ |
| A D | t2080_sd_rcw.cfg | 5 #SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s 12 #SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
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| A D | t2080_spi_rcw.cfg | 5 #SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s 12 #SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
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| A D | t2080_nand_rcw.cfg | 5 #SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s 12 #SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
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| A D | t2081_sd_rcw.cfg | 4 #Core/DDR: 1533Mhz/2133MT/s
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| A D | t2081_spi_rcw.cfg | 4 #Core/DDR: 1533Mhz/2133MT/s
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| A D | t2081_nand_rcw.cfg | 4 #Core/DDR: 1533Mhz/2133MT/s
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| /board/freescale/common/ |
| A D | ngpixis.c | 88 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); in __clear_altbank() 90 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); in __clear_altbank() 103 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw); in __set_altbank() 105 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg); in __set_altbank() 111 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); in __set_altbank() 113 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); in __set_altbank() 148 PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en)); in pixis_dump_regs()
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| A D | ngpixis.h | 44 } s[9]; /* s[0]..s[7] is SW1..SW8, and s[8] is SW11 */ member 51 #define PIXIS_SW(x) (pixis->s[(x) - 1].sw) 54 #define PIXIS_EN(x) (pixis->s[(x) - 1].en)
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| /board/amlogic/odroid-n2/ |
| A D | odroid-n2.c | 63 char s[128]; in odroid_set_fdtfile() local 65 snprintf(s, sizeof(s), "amlogic/meson-%s-odroid-%s.dtb", soc, variant); in odroid_set_fdtfile() 66 env_set("fdtfile", s); in odroid_set_fdtfile()
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| /board/ti/common/ |
| A D | Kconfig | 4 Support for detection board information on Texas Instrument's 8 int "Board EEPROM's I2C bus address" 14 hex "Board EEPROM's I2C chip address" 20 int "Cape EEPROM's I2C bus address"
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| /board/gdsys/mpc8308/ |
| A D | Kconfig | 20 The base address of the first FPGA's register map. 26 The base address of the first FPGA's register map. 31 The base address of the second FPGA's register map. 36 The base address of the second FPGA's register map.
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| /board/rockchip/tinker_rk3288/ |
| A D | MAINTAINERS | 14 F: arch/arm/dts/rk3288-tinker-s-u-boot.dtsi 17 F: configs/tinker-s-rk3288_defconfig
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| /board/rockchip/evb_rk3308/ |
| A D | MAINTAINERS | 13 F: configs/rock-pi-s-rk3308_defconfig 14 F: arch/arm/dts/rk3308-rock-pi-s*
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| /board/cavium/thunderx/ |
| A D | MAINTAINERS | 2 M: Sergey Temerkhanov <s.temerkhanov@gmail.com>
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| /board/freescale/t102xrdb/ |
| A D | t1023_sd_rcw.cfg | 4 #Default Core=1200MHz, DDR=1600MT/s with single source clock
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| A D | t1023_spi_rcw.cfg | 4 #Default Core=1200MHz, DDR=1600MT/s with single source clock
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