Searched refs:CS0 (Results 1 – 4 of 4) sorted by relevance
| /drivers/ddr/marvell/axp/ |
| A D | ddr3_pbs.c | 206 [dq], CS0, (1 - ecc) * in ddr3_pbs_tx()
452 ddr3_pbs_write_pup_dqs_reg(CS0, in ddr3_tx_shift_dqs_adll_step_before_fail()
646 [dq], CS0, in ddr3_pbs_rx()
654 DQ_NUM, CS0, in ddr3_pbs_rx()
701 (PUP_DQS_RD, CS0, in ddr3_pbs_rx()
717 [dq], CS0, in ddr3_pbs_rx()
1046 ddr3_write_pup_reg(PUP_DQS_RD, CS0, in ddr3_rx_shift_dqs_to_first_fail()
1114 pbs_dq_mapping[idx][dq], CS0, in lock_pups()
1222 CS0, idx, 0, pbs_curr_val); in ddr3_pbs_per_bit()
1226 CS0, idx, 0, pbs_curr_val); in ddr3_pbs_per_bit()
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| A D | ddr3_hw_training.c | 731 mode_config[i], CS0, pup); in ddr3_save_training()
743 CS0, in ddr3_save_training()
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| A D | ddr3_hw_training.h | 121 #define CS0 0 macro
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| A D | ddr3_sdram.c | 416 CS0, val, 0, pbs_lock_val); in ddr3_sdram_pbs_compare()
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