Searched refs:D (Results 1 – 14 of 14) sorted by relevance
| /drivers/misc/ |
| A D | k3_j784s4_bist_static_data.h | 121 .D = 0x0u,
140 .D = 0x0u,
159 .D = 0x0u,
178 .D = 0x0u,
197 .D = 0x0u,
216 .D = 0x0u,
235 .D = 0x0u,
254 .D = 0x0u,
273 .D = 0x0u,
292 .D = 0x0u,
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| A D | k3_bist_static_data.h | 209 u32 D; member
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| A D | k3_bist.c | 317 writel(config->D, base + PBIST_D); in pbist_rom_self_test()
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| /drivers/bios_emulator/include/x86emu/ |
| A D | regs.h | 99 i386_general_register A, B, C, D; member
132 #define R_DH gen.D.I8_reg.h_reg
133 #define R_DL gen.D.I8_reg.l_reg
139 #define R_DX gen.D.I16_reg.x_reg
145 #define R_EDX gen.D.I32_reg.e_reg
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| /drivers/ddr/marvell/axp/ |
| A D | ddr3_write_leveling.c | 123 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_hw()
153 [D], 2); in ddr3_write_leveling_hw()
356 [D]; in ddr3_wl_supplement()
372 [D]; in ddr3_wl_supplement()
388 [D] = delay; in ddr3_wl_supplement()
546 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_hw_reg_dimm()
557 dram_info->wl_val[cs][pup][D] = in ddr3_write_leveling_hw_reg_dimm()
589 [D], 2); in ddr3_write_leveling_hw_reg_dimm()
1271 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_single_cs()
1308 DEBUG_WL_D((u32) dram_info->wl_val[cs][pup][D], 2); in ddr3_write_leveling_single_cs()
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| A D | ddr3_read_leveling.c | 116 dram_info->rl_val[cs][pup][D] = delay; in ddr3_read_leveling_hw()
143 rl_val[cs][pup][D], 2); in ddr3_read_leveling_hw()
273 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][D], 2); in ddr3_read_leveling_sw()
291 delay = dram_info->rl_val[cs][pup][D]; in ddr3_read_leveling_sw()
1129 dram_info->rl_val[cs][idx][D] = tmp % MAX_DELAY_INV; in ddr3_read_leveling_single_cs_window_mode()
1144 dram_info->rl_val[cs][idx][D] = tmp % MAX_DELAY; in ddr3_read_leveling_single_cs_window_mode()
1168 dram_info->rl_val[cs][idx][D] = tmp % MAX_DELAY; in ddr3_read_leveling_single_cs_window_mode()
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| A D | ddr3_hw_training.h | 114 #define D 3 macro
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| A D | ddr3_dqs.c | 396 [D] : curr_adll); in ddr3_find_adll_limits()
1314 dram_info->wl_val[cs][pup_num][D]); in ddr3_set_dqs_centralization_results()
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| /drivers/clk/meson/ |
| A D | Kconfig | 7 the S905, S905X/D and S912.
15 the A113X/D
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| /drivers/phy/ |
| A D | Kconfig | 63 bool "MIPI D-PHY support helpers"
65 Provides a number of helpers a core functions for MIPI D-PHY drivers.
210 bool "Amlogic Meson AXG MIPI D-PHY"
216 MIPI D-PHY.
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| /drivers/dma/ti/ |
| A D | k3-udma-u-boot.c | 170 udma_rflow_write(uc->rflow, UDMA_RFLOW_REG(D), in udma_alloc_rchan_raw()
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| /drivers/usb/gadget/rcar/ |
| A D | fifo.c | 1032 fifo->sel = D##channel##FIFOSEL; \
1033 fifo->ctr = D##channel##FIFOCTR; \
1041 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
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| A D | pipe.c | 137 CASE_PIPExTRN(D); in usbhsp_pipe_trn_set()
173 CASE_PIPExTRE(D); in usbhsp_pipe_tre_set()
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| /drivers/video/ |
| A D | Kconfig | 303 bool "Enable Himax HX-8238D LCD driver"
306 Support for HX-8238D LCD Panel
307 The HX8238-D is a single chip controller and driver LSI that
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