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Searched refs:DDR4_MR3_REG (Results 1 – 4 of 4) sorted by relevance

/drivers/ddr/marvell/a38x/
A Dmv_ddr4_mpr_pda_if.c126 status = ddr3_tip_if_write(dev_num, access_type, if_id, DDR4_MR3_REG, in mv_ddr4_mode_regs_init()
203 status = ddr3_tip_if_write(dev_num, ACCESS_TYPE_UNICAST, if_id, DDR4_MR3_REG, val, mask); in mv_ddr4_mpr_read_mode_enable()
232 status = ddr3_tip_if_write(dev_num, ACCESS_TYPE_UNICAST, if_id, DDR4_MR3_REG, val, mask); in mv_ddr4_mpr_mode_disable()
338 status = ddr3_tip_if_write(dev_num, ACCESS_TYPE_UNICAST, if_id, DDR4_MR3_REG, val, mask); in mv_ddr4_mpr_write_mode_enable()
645 status = ddr3_tip_if_write(dev_num, access_type, if_id, DDR4_MR3_REG, val, mask); in mv_ddr4_pda_ctrl()
A Dmv_ddr_regs.h386 #define DDR4_MR3_REG 0x190c macro
A Dddr3_training_leveling.c1702 ddr3_tip_if_write(0, ACCESS_TYPE_UNICAST, 0, DDR4_MR3_REG, val, mask); in mpr_rd_frmt_config()
A Dddr3_training.c193 {MRS3_CMD, DDR4_MR3_REG},

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