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Searched refs:DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK (Results 1 – 4 of 4) sorted by relevance

/drivers/ram/stm32mp1/
A Dstm32mp1_ddr_regs.h241 #define DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK GENMASK(13, 12) macro
A Dstm32mp1_ram.c182 u32 reg = readl(&ctl->mstr) & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK; in get_data_bus_width()
A Dstm32mp1_ddr.c752 switch (config->c_reg.mstr & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK) { in stm32mp1_ddr_init()
A Dstm32mp1_tests.c939 switch (readl(&ctl->mstr) & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK) { in test_freq_pattern()

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