Searched refs:DDR_TIMING_REG (Results 1 – 4 of 4) sorted by relevance
| /drivers/ddr/marvell/a38x/ |
| A D | mv_ddr_regs.h | 169 #define DDR_TIMING_REG 0x142c macro
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| A D | ddr3_training.c | 634 DDR_TIMING_REG, 0x28 << 9, 0x3f << 9)); in hws_ddr3_tip_init_controller()
637 DDR_TIMING_REG, 0xa << 21, 0xff << 21)); in hws_ddr3_tip_init_controller()
1811 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, DDR_TIMING_REG, in ddr3_tip_set_timing()
1874 DDR_TIMING_REG, in ddr4_tip_set_timing()
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| /drivers/ddr/marvell/a38x/old/ |
| A D | ddr3_training_ip_flow.h | 114 #define DDR_TIMING_REG 0x142c macro
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| A D | ddr3_training.c | 600 DDR_TIMING_REG, txpdll << 4, in hws_ddr3_tip_init_controller()
604 DDR_TIMING_REG, 0x28 << 9, 0x3f << 9)); in hws_ddr3_tip_init_controller()
607 DDR_TIMING_REG, 0xa << 21, 0xff << 21)); in hws_ddr3_tip_init_controller()
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