Home
last modified time | relevance | path

Searched refs:DE (Results 1 – 2 of 2) sorted by relevance

/drivers/ddr/marvell/axp/
A Dddr3_read_leveling.c846 dram_info->rl_val[cs][idx][DE] = delay; in ddr3_read_leveling_single_cs_window_mode()
1101 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][DE], 2); in ddr3_read_leveling_single_cs_window_mode()
1118 MAX_DELAY_INV + dram_info->rl_val[cs][idx][DE]; in ddr3_read_leveling_single_cs_window_mode()
1135 MAX_DELAY + dram_info->rl_val[cs][idx][DE]; in ddr3_read_leveling_single_cs_window_mode()
1157 dram_info->rl_val[cs][idx][DE]; in ddr3_read_leveling_single_cs_window_mode()
A Dddr3_hw_training.h119 #define DE 5 macro

Completed in 8 milliseconds