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Searched refs:DENALI_CTL_251 (Results 1 – 7 of 7) sorted by relevance

/drivers/ddr/imx/imx8ulp/
A Dddr_init.c16 #define DENALI_CTL_251 (DDR_CTL_BASE_ADDR + 4 * 251) macro
/drivers/ram/k3-ddrss/am64/
A Dlpddr4_ctl_regs.h273 volatile u32 DENALI_CTL_251; member
A Dlpddr4_ddr_controller_macros.h3643 #define LPDDR4__MR10_DATA_F0_1__REG DENALI_CTL_251
/drivers/ram/k3-ddrss/j721e/
A Dlpddr4_ctl_regs.h273 volatile u32 DENALI_CTL_251; member
A Dlpddr4_ddr_controller_macros.h4323 #define LPDDR4__WATCHDOG_THRESHOLD_TASK_ARB_F2__REG DENALI_CTL_251
4329 #define LPDDR4__WATCHDOG_THRESHOLD_BUS_ARB_F2__REG DENALI_CTL_251
/drivers/ram/k3-ddrss/am62a/
A Dlpddr4_ctl_regs.h275 volatile u32 DENALI_CTL_251; member
A Dlpddr4_ddr_controller_macros.h3655 #define LPDDR4__MR8_DATA_1__REG DENALI_CTL_251
3661 #define LPDDR4__MR10_DATA_F0_0__REG DENALI_CTL_251

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