Searched refs:DENALI_PHY_1547 (Results 1 – 3 of 3) sorted by relevance
38 #define DENALI_PHY_1547 (DDR_PHY_BASE_ADDR + 4 * 1547) macro63 reg_val = readl(DENALI_PHY_1547) & ~(0x1 << 8); in ddr_enable_pll_bypass()64 writel(reg_val, DENALI_PHY_1547); in ddr_enable_pll_bypass()
207 #define LPDDR4__PHY_ADR_CALVL_START_2__REG DENALI_PHY_1547213 #define LPDDR4__PHY_ADR_CALVL_COARSE_DLY_2__REG DENALI_PHY_1547
1548 volatile u32 DENALI_PHY_1547; member
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