Searched refs:DFS_REG (Results 1 – 4 of 4) sorted by relevance
| /drivers/ddr/marvell/a38x/old/ |
| A D | ddr3_training.c | 1321 DFS_REG, 0x1, 0x1)); in ddr3_tip_freq_set() 1325 DFS_REG, 0, 0x1)); in ddr3_tip_freq_set() 1334 DFS_REG, 0x2, 0x2)); in ddr3_tip_freq_set() 1354 (dev_num, access_type, if_id, DFS_REG, 0x4, in ddr3_tip_freq_set() 1358 if_id, 0x8, 0x8, DFS_REG, in ddr3_tip_freq_set() 1388 (dev_num, access_type, if_id, DFS_REG, in ddr3_tip_freq_set() 1391 (dev_num, access_type, if_id, DFS_REG, in ddr3_tip_freq_set() 1396 (dev_num, access_type, if_id, DFS_REG, in ddr3_tip_freq_set() 1486 (dev_num, access_type, if_id, DFS_REG, 0, in ddr3_tip_freq_set() 1489 (dev_num, ACCESS_TYPE_UNICAST, if_id, 0, 0x8, DFS_REG, in ddr3_tip_freq_set() [all …]
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| A D | ddr3_training_ip_flow.h | 125 #define DFS_REG 0x1528 macro
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| /drivers/ddr/marvell/a38x/ |
| A D | ddr3_training.c | 1337 DFS_REG, 0x1, 0x1)); in ddr3_tip_freq_set() 1341 DFS_REG, 0, 0x1)); in ddr3_tip_freq_set() 1350 DFS_REG, 0x2, 0x2)); in ddr3_tip_freq_set() 1385 (dev_num, access_type, if_id, DFS_REG, 0x4, in ddr3_tip_freq_set() 1389 if_id, 0x8, 0x8, DFS_REG, in ddr3_tip_freq_set() 1430 (dev_num, access_type, if_id, DFS_REG, in ddr3_tip_freq_set() 1433 (dev_num, access_type, if_id, DFS_REG, in ddr3_tip_freq_set() 1442 (dev_num, access_type, if_id, DFS_REG, in ddr3_tip_freq_set() 1542 (dev_num, access_type, if_id, DFS_REG, 0, in ddr3_tip_freq_set() 1545 (dev_num, ACCESS_TYPE_UNICAST, if_id, 0, 0x8, DFS_REG, in ddr3_tip_freq_set() [all …]
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| A D | mv_ddr_regs.h | 227 #define DFS_REG 0x1528 macro
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