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Searched refs:DP_PADCTL (Results 1 – 2 of 2) sorted by relevance

/drivers/video/tegra/tegra124/
A Dsor.c75 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dp_disable_tx_pu()
220 reg_val = tegra_sor_readl(sor, DP_PADCTL(sor->portnum)); in tegra_dc_sor_power_dplanes()
250 reg_val = tegra_sor_readl(sor, DP_PADCTL(sor->portnum)); in tegra_dc_sor_set_panel_power()
257 tegra_sor_writel(sor, DP_PADCTL(sor->portnum), reg_val); in tegra_dc_sor_set_panel_power()
479 reg = tegra_sor_readl(sor, DP_PADCTL(sor->portnum)); in tegra_dc_sor_power_up()
499 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_power_up()
599 DUMP_REG(DP_PADCTL(0)); in dump_sor_reg()
600 DUMP_REG(DP_PADCTL(1)); in dump_sor_reg()
849 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_set_lane_parm()
952 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_sor_precharge_lanes()
[all …]
A Dsor.h675 #define DP_PADCTL(i) (0x5c + (i)) macro

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