Searched refs:GPIO_BIT (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpio/ |
| A D | tegra_gpio.c | 51 type = (u >> GPIO_BIT(gpio)) & 1; in get_config()
71 u |= 1 << GPIO_BIT(gpio); in set_config()
73 u &= ~(1 << GPIO_BIT(gpio)); in set_config()
86 dir = (u >> GPIO_BIT(gpio)) & 1; in get_direction()
106 u |= 1 << GPIO_BIT(gpio); in set_direction()
108 u &= ~(1 << GPIO_BIT(gpio)); in set_direction()
120 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high); in set_level()
124 u |= 1 << GPIO_BIT(gpio); in set_level()
126 u &= ~(1 << GPIO_BIT(gpio)); in set_level()
182 return (val >> GPIO_BIT(gpio)) & 1; in tegra_gpio_get_value()
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| A D | gpio-aspeed.c | 183 #define GPIO_BIT(x) BIT(GPIO_OFFSET(x)) macro
200 dir &= ~GPIO_BIT(offset); in aspeed_gpio_direction_input()
214 dir |= GPIO_BIT(offset); in aspeed_gpio_direction_output()
218 output |= GPIO_BIT(offset); in aspeed_gpio_direction_output()
220 output &= ~GPIO_BIT(offset); in aspeed_gpio_direction_output()
232 return !!(readl(bank_reg(priv, bank, reg_val)) & GPIO_BIT(offset)); in aspeed_gpio_get_value()
243 data |= GPIO_BIT(offset); in aspeed_gpio_set_value()
245 data &= ~GPIO_BIT(offset); in aspeed_gpio_set_value()
257 if (readl(bank_reg(priv, bank, reg_dir)) & GPIO_BIT(offset)) in aspeed_gpio_get_function()
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| A D | npcm_sgpio.c | 28 #define GPIO_BIT(x) ((x) % 8) macro
171 reg |= BIT(GPIO_BIT(offset)); in npcm_sgpio_direction_output()
173 reg &= ~BIT(GPIO_BIT(offset)); in npcm_sgpio_direction_output()
198 return !!(reg & BIT(GPIO_BIT(offset))); in npcm_sgpio_get_value()
207 if (!!(check & BIT(GPIO_BIT(offset))) == 0) in npcm_sgpio_set_value()
244 if (GPIO_BIT(priv->nin_sgpio) > 0) in npcm_sgpio_set_port()
248 if (GPIO_BIT(priv->nout_sgpio) > 0) in npcm_sgpio_set_port()
371 priv->persist[GPIO_BANK(val[0])] = priv->persist[GPIO_BANK(val[0])] | BIT(GPIO_BIT(val[0])); in npcm_sgpio_probe()
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| A D | octeon_gpio.c | 23 #define GPIO_BIT(x) BIT_ULL((x) & 0x3f) macro
100 writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs + in octeon_gpio_dir_output()
117 !!(reg & GPIO_BIT(offset))); in octeon_gpio_get_value()
119 return !!(reg & GPIO_BIT(offset)); in octeon_gpio_get_value()
128 writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs + in octeon_gpio_set_value()
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| A D | da8xx_gpio.c | 348 setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); in _gpio_direction_input()
355 ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio)); in _gpio_get_value()
362 bank->set_data = 1U << GPIO_BIT(gpio); in _gpio_set_value()
364 bank->clr_data = 1U << GPIO_BIT(gpio); in _gpio_set_value()
371 return in_le32(&bank->dir) & (1U << GPIO_BIT(gpio)); in _gpio_get_dir()
377 clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); in _gpio_direction_output()
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| A D | gpio-aspeed-sgpio.c | 111 #define GPIO_BIT(x) BIT(GPIO_OFFSET(x) >> 1) macro
190 temp |= GPIO_BIT(offset); in aspeed_g4_reg_bit_set()
192 temp &= ~GPIO_BIT(offset); in aspeed_g4_reg_bit_set()
203 return !!(readl(addr) & GPIO_BIT(offset)); in aspeed_g4_reg_bit_get()
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| A D | da8xx_gpio.h | 29 #define GPIO_BIT(gp) ((gp) & 0x1F) macro
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