Searched refs:MR0_REG (Results 1 – 4 of 4) sorted by relevance
| /drivers/ddr/marvell/a38x/ |
| A D | mv_ddr_regs.h | 367 #define MR0_REG 0x15d0 macro
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| A D | ddr3_training.c | 200 {MRS0_CMD, MR0_REG},
555 MR0_REG, data_value, in hws_ddr3_tip_init_controller()
559 MR0_REG, twr_mask_table[t_wr] << 9, in hws_ddr3_tip_init_controller()
1576 (dev_num, access_type, if_id, MR0_REG, in ddr3_tip_freq_set()
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| /drivers/ddr/marvell/a38x/old/ |
| A D | ddr3_training_ip_flow.h | 138 #define MR0_REG 0x15d0 macro
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| A D | ddr3_training.c | 516 MR0_REG, data_value, in hws_ddr3_tip_init_controller()
520 MR0_REG, twr_mask_table[t_wr + 1], in hws_ddr3_tip_init_controller()
1520 (dev_num, access_type, if_id, MR0_REG, in ddr3_tip_freq_set()
1557 0, MR0_REG, val, in ddr3_tip_freq_set()
1709 MR0_REG, mode_info->reg_mr0, MASK_ALL_BITS); in hws_ddr3_tip_mode_read()
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