Searched refs:MR2_REG (Results 1 – 4 of 4) sorted by relevance
| /drivers/ddr/marvell/a38x/ |
| A D | mv_ddr_regs.h | 369 #define MR2_REG 0x15d8 macro
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| A D | ddr3_training.c | 202 {MRS2_CMD, MR2_REG},
585 MR2_REG, data_value, in hws_ddr3_tip_init_controller()
1588 if_id, MR2_REG, in ddr3_tip_freq_set()
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| /drivers/ddr/marvell/a38x/old/ |
| A D | ddr3_training_ip_flow.h | 140 #define MR2_REG 0x15d8 macro
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| A D | ddr3_training.c | 545 MR2_REG, data_value, in hws_ddr3_tip_init_controller()
1532 if_id, MR2_REG, in ddr3_tip_freq_set()
1565 0, MR2_REG, val, (0x7 << 3))); in ddr3_tip_freq_set()
1719 MR2_REG, mode_info->reg_mr2, MASK_ALL_BITS); in hws_ddr3_tip_mode_read()
1811 reg = (cmd == MRS1_CMD) ? MR1_REG : MR2_REG; in ddr3_tip_write_mrs_cmd()
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