Searched refs:OFFSET_SEL (Results 1 – 3 of 3) sorted by relevance
| /drivers/ram/starfive/ |
| A D | ddrphy_start.c | 13 {78, 0xfffffcff, 0x0, (OFFSET_SEL | REGCLRSETALL)},
15 {334, 0xfffffcff, 0x0, (OFFSET_SEL | REGCLRSETALL)},
17 {590, 0xfffffcff, 0x0, (OFFSET_SEL | REGCLRSETALL)},
19 {846, 0xfffffcff, 0x0, (OFFSET_SEL | REGCLRSETALL)},
20 {1793, 0xfffffeff, 0x0, (OFFSET_SEL | REGCLRSETALL)},
21 {1793, 0xfffcffff, 0x0, (OFFSET_SEL | REGCLRSETALL)},
126 {96, 0x0, 0x300, (OFFSET_SEL | REGADDSETALL)},
159 {1913, 0x0, 0xff8f, (OFFSET_SEL | REGSETALL)},
166 {1919, 0x0, 0xe10, (OFFSET_SEL | REGSETALL)},
198 {1849, 0x0, 0x3f, (OFFSET_SEL | REGSETALL)},
[all …]
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| A D | ddrcsr_boot.c | 19 {0xf00, 0x0, 0x40001030, (OFFSET_SEL | F_SET | REG2G)},
21 {0xf04, 0x0, 0x00800001, (OFFSET_SEL | F_SET | REG2G)},
22 {0xf10, 0x0, 0x00400000, (OFFSET_SEL | REGSETALL)},
23 {0xf14, 0x0, 0x043fffff, (OFFSET_SEL | REGSETALL)},
24 {0xf18, 0x0, 0x00000000, (OFFSET_SEL | REGSETALL)},
25 {0xf30, 0x0, 0x1f000041, (OFFSET_SEL | REGSETALL)},
27 {0x110, 0x0, 0xc0000001, (OFFSET_SEL | REGSETALL)},
28 {0x114, 0x0, 0xffffffff, (OFFSET_SEL | REGSETALL)},
178 {0x704, 0x0, 0x00000007, REGSETALL | OFFSET_SEL},
187 {0x700, 0x0, 0x00000003, REGSETALL | OFFSET_SEL},
[all …]
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| A D | starfive_ddr.h | 28 #define OFFSET_SEL BIT(31) macro
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Completed in 6 milliseconds