Searched refs:PBS_RX_PHY_REG (Results 1 – 8 of 8) sorted by relevance
| /drivers/ddr/marvell/a38x/old/ |
| A D | ddr3_training_centralization.c | 629 PBS_RX_PHY_REG + pad_num, in ddr3_tip_special_rx()
639 PBS_RX_PHY_REG + pad_num, in ddr3_tip_special_rx()
652 DDR_PHY_DATA, PBS_RX_PHY_REG + 4, in ddr3_tip_special_rx()
659 PBS_RX_PHY_REG + 4, temp)); in ddr3_tip_special_rx()
663 DDR_PHY_DATA, PBS_RX_PHY_REG + 5, in ddr3_tip_special_rx()
670 PBS_RX_PHY_REG + 5, temp)); in ddr3_tip_special_rx()
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| A D | ddr3_training_pbs.c | 780 (PBS_RX_PHY_REG + effective_cs * 0x10) : in ddr3_tip_pbs()
939 (PBS_RX_PHY_REG + cs_num * 0x10) : in ddr3_tip_print_pbs_result()
977 (PBS_RX_PHY_REG + effective_cs * 0x10) : in ddr3_tip_clean_pbs_result()
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| A D | ddr3_training_ip_flow.h | 216 #define PBS_RX_PHY_REG 0x50 macro
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| /drivers/ddr/marvell/a38x/ |
| A D | ddr3_training_centralization.c | 659 PBS_RX_PHY_REG(effective_cs, pad_num), in ddr3_tip_special_rx()
669 PBS_RX_PHY_REG(effective_cs, pad_num), in ddr3_tip_special_rx()
683 PBS_RX_PHY_REG(effective_cs, 4), in ddr3_tip_special_rx()
690 PBS_RX_PHY_REG(effective_cs, 4), in ddr3_tip_special_rx()
696 PBS_RX_PHY_REG(effective_cs, 5), in ddr3_tip_special_rx()
703 PBS_RX_PHY_REG(effective_cs, 5), in ddr3_tip_special_rx()
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| A D | ddr3_training_pbs.c | 776 PBS_RX_PHY_REG(effective_cs, 0) : in ddr3_tip_pbs()
944 PBS_RX_PHY_REG(cs_num, 0) : in ddr3_tip_print_pbs_result()
994 PBS_RX_PHY_REG(effective_cs, 0) : in ddr3_tip_clean_pbs_result()
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| A D | mv_ddr_regs.h | 514 #define PBS_RX_PHY_REG(cs, bit) (PBS_RX_PHY_BASE + (cs) * 0x10 + (bit)) macro
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| A D | mv_ddr4_training_calibration.c | 1151 reg_addr = PBS_RX_PHY_REG(effective_cs, DQSP_PAD); in mv_ddr4_tap_tuning()
1157 reg_addr = PBS_RX_PHY_REG(effective_cs, DQSN_PAD); in mv_ddr4_tap_tuning()
1537 reg_addr = PBS_RX_PHY_REG(effective_cs, DQSP_PAD); in mv_ddr4_tap_tuning()
1541 reg_addr = PBS_RX_PHY_REG(effective_cs, DQSN_PAD); in mv_ddr4_tap_tuning()
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| A D | ddr3_training.c | 2040 PBS_RX_PHY_REG(effective_cs, DQSP_PAD), 0)); in ddr3_tip_ddr3_reset_phy_regs()
2048 PBS_RX_PHY_REG(effective_cs, DQSN_PAD), 0)); in ddr3_tip_ddr3_reset_phy_regs()
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