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Searched refs:PHY_LOCK_STATUS_REG (Results 1 – 5 of 5) sorted by relevance

/drivers/ddr/marvell/a38x/
A Dmv_ddr_regs.h305 #define PHY_LOCK_STATUS_REG 0x1674 macro
A Dmv_ddr_plat.c1600 …ddr3_tip_if_polling(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x3FFFFFF, 0x3FFFFFF, PHY_LOCK_STATUS_REG, in mv_ddr4_calibration_validate()
1623 …ddr3_tip_if_polling(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x3FFFFFF, 0x3FFFFFF, PHY_LOCK_STATUS_REG, in mv_ddr4_calibration_validate()
A Dddr3_training.c1207 0x3ff03ff, 0x3ff03ff, PHY_LOCK_STATUS_REG, in adll_calibration()
1518 0x3ff03ff, PHY_LOCK_STATUS_REG, in ddr3_tip_freq_set()
/drivers/ddr/marvell/a38x/old/
A Dddr3_training_ip_flow.h147 #define PHY_LOCK_STATUS_REG 0x1674 macro
A Dddr3_training.c1203 0x3ff03ff, 0x3ff03ff, PHY_LOCK_STATUS_REG, in adll_calibration()
1462 0x3ff03ff, PHY_LOCK_STATUS_REG, in ddr3_tip_freq_set()

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