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Searched refs:PLL0 (Results 1 – 3 of 3) sorted by relevance

/drivers/clk/starfive/
A Dclk-jh7110-pll.c38 PLL0 = 0, enumerator
183 .type = PLL0,
351 if (IS_ENABLED(CONFIG_XPL_BUILD) && pll->type == PLL0) in starfive_jh7110_pll()
/drivers/video/tegra/tegra124/
A Dsor.c496 tegra_sor_write_field(sor, PLL0, PLL0_PWR_MASK | /* PDPLL */ in tegra_dc_sor_power_up()
516 tegra_sor_write_field(sor, PLL0, in tegra_dc_sor_power_up()
564 DUMP_REG(PLL0); in dump_sor_reg()
711 tegra_sor_writel(sor, PLL0, in tegra_dc_sor_enable_dp()
A Dsor.h221 #define PLL0 0x17 macro

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