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Searched refs:PLL2 (Results 1 – 3 of 3) sorted by relevance

/drivers/video/tegra/tegra124/
A Dsor.c489 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
510 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
521 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
527 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
566 DUMP_REG(PLL2); in dump_sor_reg()
703 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
717 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
727 if (tegra_dc_sor_poll_register(sor, PLL2, in tegra_dc_sor_enable_dp()
735 tegra_sor_write_field(sor, PLL2, PLL2_AUX2_MASK | in tegra_dc_sor_enable_dp()
A Dsor.h255 #define PLL2 0x19 macro
/drivers/clk/starfive/
A Dclk-jh7110-pll.c40 PLL2, enumerator
41 PLL_MAX = PLL2
197 .type = PLL2,
354 if (IS_ENABLED(CONFIG_XPL_BUILD) && pll->type == PLL2) in starfive_jh7110_pll()

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